Document Number: 002-00856 Rev. *E
S29JL064J
17. AC Characteristics
17.1
Read-Only Operations
Notes:
1. Not 100% tested.
2. See
and
for test specifications
3. Measurements performed by placing a 50 ohm termination on the data pin with a bias of V
CC
/2. The time from OE# high to the data bus driven to V
CC
/2 is taken as t
DF
.
Figure 17.1
Read Operation Timings
Parameter
Description
Test Setup
Speed Options
JEDEC
Std.
55
60
70
Unit
t
AVAV
t
RC
Min
55
60
70
ns
t
AVQV
t
ACC
Address to Output Delay
CE#,
OE# = V
IL
Max
55
60
70
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
55
60
70
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
25
30
ns
t
EHQZ
t
DF
Chip Enable to Output High-Z (Notes
)
Max
16
ns
t
GHQZ
t
DF
Output Enable to Output High-Z (Notes
)
Max
16
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First
Min
0
ns
t
OEH
Output Enable Hold Time
Read
Min
0
ns
Toggle and
Data# Polling
Min
5
10
ns
t
OH
t
CE
Outputs
WE#
Addresses
CE#
OE#
High-Z
Output Valid
High-Z
Addresses Stable
t
RC
t
ACC
t
OEH
t
RH
t
OE
t
RH
0 V
RY/BY#
RESET#
t
DF
