Cypress Semiconductor MoBL CY62157EV30, Specification Sheet

Page: 4 / 14

CY62157EV30 MoBL
®
Document #: 38-05445 Rev. *E Page 4 of 14
Maximum Ratings
Exceeding maximum ratings may shorten the battery life of the
device. User guidelines are not tested.
Storage Temperature ................................–65°C to + 150°C
Ambient Temperature with
Power Applied ...........................................–55°C to + 125°C
Supply Voltage to Ground
Potential ................................–0.3V to 3.9V (V
CCmax
+ 0.3V)
DC Voltage Applied to Outputs
in High-Z State
[6, 7]
................–0.3V to 3.9V (V
CCmax
+ 0.3V)
DC Input Voltage
[6, 7]
........... –0.3V to 3.9V (V
CC max
+ 0.3V)
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage .......................................... > 2001V
(MIL-STD-883, Method 3015)
Latch up Current .................................................... > 200 mA
Operating Range
Device Range
Ambient
Temperature
V
CC
[8]
CY62157EV30LL Ind’l/Auto-A –40°C to +85°C 2.20V to
3.60V
Electrical Characteristics
Over the Operating Range
Parameter Description Test Conditions
45 ns (Ind’l/Auto-A)
Unit
Min Typ
[2]
Max
V
OH
Output HIGH Voltage I
OH
= –0.1 mA 2.0 V
I
OH
= –1.0 mA, V
CC
> 2.70V 2.4 V
V
OL
Output LOW Voltage I
OL
= 0.1 mA 0.4 V
I
OL
= 2.1mA, V
CC
> 2.70V 0.4 V
V
IH
Input HIGH Voltage V
CC
= 2.2V to 2.7V 1.8 V
CC
+ 0.3 V
V
CC
= 2.7V to 3.6V 2.2 V
CC
+ 0.3 V
V
IL
Input LOW Voltage V
CC
= 2.2V to 2.7V –0.3 0.6 V
V
CC
= 2.7V to 3.6V –0.3 0.8 V
I
IX
Input Leakage Current GND < V
I
< V
CC
–1 +1
µ
A
I
OZ
Output Leakage Current GND < V
O
< V
CC
, Output Disabled –1 +1
µ
A
I
CC
V
CC
Operating Supply Current f = f
max
= 1/t
RC
V
CC
= V
CCmax
I
OUT
= 0 mA
CMOS levels
18 25
mA
f = 1 MHz 1.8 3
I
SB1
Automatic CE Power Down
Current — CMOS Inputs
CE
1
> V
CC
−
0.2V, CE
2
< 0.2V
V
IN
> V
CC
– 0.2V, V
IN
< 0.2V)
f = f
max
(Address and Data Only),
f = 0 (OE, BHE, BLE and WE), V
CC
= 3.60V
2 8
µ
A
I
SB2
[9]
Automatic CE Power Down
Current — CMOS Inputs
CE
1
> V
CC
– 0.2V or CE
2
< 0.2V,
V
IN
> V
CC
– 0.2V or V
IN
< 0.2V, f = 0, V
CC
= 3.60V
2 8
µ
A
Capacitance
[10]
Parameter Description Test Conditions Max Unit
C
IN
Input Capacitance T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ)
10 pF
C
OUT
Output Capacitance 10 pF
Notes
6. V
IL(min)
= –2.0V for pulse durations less than 20 ns.
7. V
IH(max)
= V
CC
+ 0.75V for pulse durations less than 20 ns.
8. Full device AC operation assumes a 100
µ
s ramp time from 0 to V
cc
(min) and 200
µ
s wait time after V
CC
stabilization.
9. Only chip enables (CE
1
and CE
2
), byte enables (BHE and BLE) and BYTE (48 TSOP I only) need to be tied to CMOS levels to meet the I
SB2
/ I
CCDR
spec. Other
inputs can be left floating.
10. Tested initially and after any design or process changes that may affect these parameters.
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