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CY62157E MoBL

®

Document #: 38-05695 Rev. *C

Page 8 of 12

Write Cycle 3 (WE Controlled, OE LOW)

[20, 21]

Write Cycle 4 (BHE/BLE Controlled, OE LOW)

[20, 21]

Switching Waveforms

 (continued)

VALID DATA

t

HD

t

SD

t

LZWE

t

PWE

t

SA

t

HA

t

AW

t

SCE

t

WC

t

HZWE

t

BW

See Note 21

CE

1

ADDRESS

CE

2

WE

DATA IO

BHE/BLE

t

HD

t

SD

t

SA

t

HA

t

AW

t

WC

VALID DATA

t

BW

t

SCE

t

PWE

See Note 21

DATA IO

ADDRESS

CE

WE

BHE/BLE

CE

2

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Summary of Contents for MoBL CY62157E

Page 1: ...eselected CE1HIGH or CE2 LOW outputs are disabled OE HIGH both Byte High Enable and Byte Low Enable are disabled BHE BLE HIGH or during a write operation CE1 LOW CE2 HIGH and WE LOW Writing to the device is accomplished by taking Chip Enable CE1 LOW and CE2 HIGH and Write Enable WE input LOW If Byte Low Enable BLE is LOW then data from IO pins IO0 through IO7 is written into the location specified...

Page 2: ...ce only and are not guaranteed or tested Typical values are measured at VCC VCC typ TA 25 C 5 Automotive product information is Preliminary WE A11 A10 A6 A0 A3 CE1 IO10 IO8 IO9 A4 A5 IO11 IO13 IO12 IO14 IO15 VSS A9 A8 OE Vss A7 IO0 BHE CE2 A17 A2 A1 BLE VCC IO2 IO1 IO3 IO4 IO5 IO6 IO7 A15 A14 A13 A12 NC A18 NC 3 2 6 5 4 1 D E B A C F G H VFBGA A16 NC Vcc Top View 1 2 3 4 5 6 7 8 9 11 14 31 32 36 3...

Page 3: ... VCC 4 5V to 5 5V 2 2 VCC 0 5 2 2 VCC 0 5 V VIL Input LOW Voltage VCC 4 5V to 5 5V 0 5 0 8 0 5 0 8 V IIX Input Leakage Current GND VI VCC 1 1 1 1 µA IOZ Output Leakage Current GND VO VCC Output Disabled 1 1 1 1 µA ICC VCC Operating Supply Current f fmax 1 tRC VCC VCCmax IOUT 0 mA CMOS levels 18 25 18 35 mA f 1 MHz 1 8 3 1 8 4 ISB1 Automatic CE Power Down Current CMOS Inputs CE1 VCC 0 2V CE2 0 2V V...

Page 4: ...2 V ICCDR Data Retention Current VCC 2V CE1 VCC 0 2V CE2 0 2V VIN VCC 0 2V or VIN 0 2V Industrial 8 µA Automotive 30 tCDR 9 Chip Deselect to Data Retention Time 0 ns tR 10 Operation Recovery Time tRC ns Data Retention Waveform 11 Notes 10 Full device operation requires linear VCC ramp from VDR to VCC min 100 µs or stable at VCC min 100 µs 11 BHE BLE is the AND of both BHE and BLE Chip can be desel...

Page 5: ... Write Start 0 0 ns tPWE WE Pulse Width 35 40 ns tBW BLE BHE LOW to Write End 35 40 ns tSD Data Set Up to Write End 25 25 ns tHD Data Hold from Write End 0 0 ns tHZWE WE LOW to High Z 13 14 18 20 ns tLZWE WE HIGH to Low Z 13 10 10 ns Notes 12 Test conditions for all parameters other than Tri state parameters assume signal transition time of 3 ns or less timing reference levels of VCC typ 2 input p...

Page 6: ...1 VIL BHE and or BLE VIL and CE2 VIH 17 WE is HIGH for read cycle 18 Address valid prior to or coincident with CE1 BHE BLE transition LOW and CE2 transition HIGH PREVIOUS DATA VALID DATA VALID tRC tAA tOHA ADDRESS DATA OUT 50 50 DATA VALID tRC tACE tDOE tLZOE tLZCE tPU HIGH IMPEDANCE tHZOE tPD tHZBE tLZBE tHZCE tDBE HIGH ICC ISB IMPEDANCE OE CE1 ADDRESS VCC SUPPLY CURRENT BHE BLE DATA OUT CE2 Feed...

Page 7: ...s LOW simultaneously with WE VIH the output remains in a high impedance state 21 During this period the IOs are in output state and input signals should not be applied Switching Waveforms continued tHD tSD tPWE tSA tHA tAW tSCE tWC tHZOE VALID DATA tBW See Note 21 ADDRESS WE DATA IO OE BHE BLE CE1 CE2 tHD tSD tPWE tHA tAW tSCE tWC tHZOE VALID DATA See Note 21 tBW tSA CE1 ADDRESS WE DATA IO OE BHE ...

Page 8: ...21 Write Cycle 4 BHE BLE Controlled OE LOW 20 21 Switching Waveforms continued VALID DATA tHD tSD tLZWE tPWE tSA tHA tAW tSCE tWC tHZWE tBW See Note 21 CE1 ADDRESS CE2 WE DATA IO BHE BLE tHD tSD tSA tHA tAW tWC VALID DATA tBW tSCE tPWE See Note 21 DATA IO ADDRESS CE1 WE BHE BLE CE2 Feedback ...

Page 9: ...igh Z Output Disabled Active ICC L H H H H L High Z Output Disabled Active ICC L H H H L L High Z Output Disabled Active ICC L H L X L L Data In IO0 IO15 Write Active ICC L H L X H L Data In IO0 IO7 High Z IO8 IO15 Write Active ICC L H L X L H High Z IO0 IO7 Data In IO8 IO15 Write Active ICC Ordering Information Speed ns Ordering Code Package Diagram Package Type Operating Range 45 CY62157ELL 45ZS...

Page 10: ...CY62157E MoBL Document 38 05695 Rev C Page 10 of 12 Package Diagrams 44 pin TSOP II 51 85087 51 85087 A Feedback ...

Page 11: ...ms where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges MoBL is a registered trademark and More Battery Life is a trademark of Cypress Semiconductor Corporation All p...

Page 12: ... Retention Characteristics from 100 µs to tRC ns Updated the Ordering Information and replaced the Package Name column with Package Diagram B 467033 See ECN NXR Added Industrial Product Final Information Removed 48 ball VFBGA package and its relevant information Changed the ICC typ value of Automotive from 2 mA to 1 8 mA for f 1MHz Changed the ISB2 typ value of Automotive from 5 µA to 1 8 µA Modif...

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