CY7C1041DV33
Document #: 38-05473 Rev. *E
Page 9 of 13
Figure 9. Write Cycle No. 4
(WE Controlled, OE LOW)
Truth Table
CE
OE
WE
BLE
BHE
IO
0
–IO
7
IO
8
–IO
15
Mode
Power
H
X
X
X
X
High-Z
High-Z
Power Down
Standby (I
SB
)
L
L
H
L
L
Data Out
Data Out
Read All Bits
Active (I
CC
)
L
L
H
L
H
Data Out
High-Z
Read Lower Bits Only
Active (I
CC
)
L
L
H
H
L
High-Z
Data Out
Read Upper Bits Only
Active (I
CC
)
L
X
L
L
L
Data In
Data In
Write All Bits
Active (I
CC
)
L
X
L
L
H
Data In
High-Z
Write Lower Bits Only
Active (I
CC
)
L
X
L
H
L
High-Z
Data In
Write Upper Bits Only
Active (I
CC
)
L
H
H
X
X
High-Z
High-Z
Selected, Outputs Disabled
Active (I
CC
)
Switching Waveforms
(continued)
t
HD
t
SD
t
SCE
t
HA
t
AW
t
PWE
t
WC
t
BW
DATA IO
ADDRESS
CE
WE
BHE, BLE
t
SA
t
LZWE
t
HZWE
NOTE
21
[+] Feedback
[+] Feedback
