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CY7C1041DV33

Document #: 38-05473  Rev. *E

Page 2 of 13 

Selection Guide

Description

–10 (Industrial)

–12 (Automotive)

[2]

Unit

Maximum Access Time

10

12

ns

Maximum Operating Current

90

95

mA

Maximum CMOS Standby Current

10

15

mA

Pin Configuration

Figure 1.  44-Pin SOJ/TSOP II

Figure 2.  48-Ball VFBGA (Pinout 1) 

[3, 4]

Figure 3.  48-Ball VFBGA (Pinout 2)

 [3, 4]

1
2
3
4
5
6
7
8
9

11

14

31

32

36
35
34
33

37

40
39
38

12
13

41

44
43
42

16

15

29

30

A

17

18

17

20

19

27

28

25

26

22

21

23

24

A

16

A

15

A

0

A

1

A

2

A

3

A

4

A

7

A

6

A

14

A

13

A

12

A

11

A

9

A

8

A

10

OE
BHE
BLE

CE

WE

IO

0

IO

1

IO

2

IO

3

IO

4

IO

5

IO

6

IO

7

IO

8

IO

9

IO

10

IO

11

IO

12

IO

13

IO

14

IO

15

V

CC

V

CC

V

SS

V

SS

NC

10

A

5

WE

V

CC

A

11

A

10

NC

A

6

A

0

A

3

CE

IO

2

IO

0

IO

1

A

4

A

5

IO

3

IO

5

IO

4

IO

6

IO

7

V

SS

A

9

A

8

OE

V

SS

A

7

IO

8

BHE

NC

A

17

A

2

A

1

BLE

V

CC

IO

9

IO

10

IO

11

IO

12

IO

13

IO

14

IO

15

A

15

A

14

A

13

A

12

NC

NC

NC

3

2

6

5

4

1

D

E

B

A

C

F

G

H

A

16

WE

V

CC

A

11

A

10

NC

A

6

A

0

A

3

CE

IO

10

IO

8

IO

9

A

4

A

5

IO

11

IO

13

IO

12

IO

14

IO

15

V

SS

A

9

A

8

OE

V

SS

A

7

IO

0

BHE

NC

A

17

A

2

A

1

BLE

V

CC

IO

2

IO

1

IO

3

IO

4

IO

5

IO

6

IO

7

A

15

A

14

A

13

A

12

NC

NC

NC

3

2

6

5

4

1

D

E

B

A

C

F

G

H

A

16

Notes

2. Automotive product information is Preliminary.
3. NC pins are not connected on the die.
4. Pinout 1 is compliant with CY7C1041CV33 and pinout 2 is JEDEC compliant. The difference between the two is that the higher and lower byte IOs (IO

[7:0]

 and IO

[15:8]

 

balls) are swapped.

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Summary of Contents for CY7C1041DV33

Page 1: ...he location specified on the address pins A0 to A17 To read from the device take Chip Enable CE and Output Enable OE LOW while forcing the Write Enable WE HIGH If BLE is LOW then data from the memory...

Page 2: ...9 IO10 IO11 IO12 IO13 IO14 IO15 VCC VCC VSS VSS NC 10 A5 WE VCC A11 A10 NC A6 A0 A3 CE IO2 IO 0 IO1 A4 A5 IO3 IO5 IO4 IO6 IO7 VSS A9 A8 OE VSS A7 IO8 BHE NC A17 A2 A1 BLE VCC IO9 IO10 IO11 IO12 IO13 I...

Page 3: ...Characteristics Over the Operating Range Parameter Description Test Conditions 10 Industrial 12 Automotive Unit Min Max Min Max VOH Output HIGH Voltage VCC Min IOH 4 0 mA 2 4 2 4 V VOL Output LOW Vol...

Page 4: ...on to Case 14 74 36 73 17 17 C W AC Test Loads and Waveforms The AC test loads and waveform diagram follows 7 90 10 3 0V GND 90 10 ALL INPUT PULSES CAPACITIVE LOAD CONSISTS OF ALL COMPONENTS OF THE TE...

Page 5: ...te End 7 8 ns tHA Address Hold from Write End 0 0 ns tSA Address Setup to Write Start 0 0 ns tPWE WE Pulse Width 7 8 ns tSD Data Setup to Write End 5 6 ns tHD Data Hold from Write End 0 0 ns tLZWE WE...

Page 6: ...ATA VALID DATA VALID tRC tAA tOHA ADDRESS DATA OUT Notes 12 The internal write time of the memory is defined by the overlap of CE LOW and WE LOW CE and WE must be LOW to initiate a write and the trans...

Page 7: ...DANCE tHZOE tHZBE tPD HIGH OE CE ICC ISB IMPEDANCE ADDRESS DATA OUT VCC SUPPLY tDBE tLZBE tHZCE BHE BLE CURRENT ICC ISB tHD tSD tSCE tSA tHA tAW tPWE tWC BW DATAIO ADDRESS CE WE BHE BLE t Notes 18 Add...

Page 8: ...OE HIGH During Write 19 20 Switching Waveforms continued tHD tSD tBW tSA tHA tAW tPWE tWC tSCE DATAIO ADDRESS BHE BLE WE CE tHD t SD tPWE tSA tHA tAW tSCE tWC t HZOE DATAIN VALID CE ADDRESS WE DATA I...

Page 9: ...a Out High Z Read Lower Bits Only Active ICC L L H H L High Z Data Out Read Upper Bits Only Active ICC L X L L L Data In Data In Write All Bits Active ICC L X L L H Data In High Z Write Lower Bits Onl...

Page 10: ...12BVXE 51 85150 48 Ball VFBGA Pb Free Automotive CY7C1041DV33 12VXE 51 85082 44 Pin 400 mil Molded SOJ Pb Free CY7C1041DV33 12ZSXE 51 85087 44 Pin TSOP II Pb Free Please contact your local Cypress sa...

Page 11: ...CY7C1041DV33 Document 38 05473 Rev E Page 11 of 13 Figure 11 44 Pin 400 mil Molded SOJ 51 85082 Figure 12 44 Pin TSOP II 51 85087 Package Diagrams continued 51 85082 B 51 85087 A Feedback Feedback...

Page 12: ...e 4 on AC Test Loads Changed reference voltage level for measurement of Hi Z parameters from 500 mV to 200 mV Added Data Retention Characteristics Waveform and footnote 11 12 Added Write Cycle WE Cont...

Page 13: ...n of this Source Code except as specified above is prohibited without the express written permission of Cypress Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS...

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