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CY25822-2

Document #: 38-07531  Rev. **

Page 6 of 9 

    

Table 5. Absolute Maximum Ratings

Parameter

Description

Condition

Min.

Max.

Unit

V

DD

Core Supply Voltage

–0.5

4.6

V

V

DD_A

Analog Supply Voltage

–0.5

4.6

V

V

IN

Input Voltage

Relative to V 

SS

–0.5

V

DD 

+ 0.5

VDC

T

S

Temperature, Storage

Non Functional

–65

+150

°C

T

A

Temperature, Operating Ambient

Functional

0

70

°C

T

J

Temperature, Junction

Functional

150

°C

ESD

HBM

ESD Protection (Human Body Model)

MIL-STD-883, Method 3015

2000

Volts

UL–94

Flammability Rating

@1/8 in.

V–0 

MSL

Moisture Sensitivity Level

1

Table 6. DC Parameters (T

A

 = 0°C to +70°C, V

DD

 = 3.3V ± 5%)

Parameter

Description

Condition

Min.

Max

Unit

Notes

V

DD

 Supply Voltage

3.135

3.465

V

V

DD 

= 3.3 ± 5%

V

IH

 Input High Voltage

2.0

V

DD 

+ 0.3

V

V

IL

Input Low Voltage

V

SS 

– 0.3

0.8

V

I

IL1

Input Leakage Current

SCLOCK

or SDATA

–25

+25

µ

A

I

IL2

Input Leakage Current

PWRDWN#

–75

–15

µ

A

V

OH

Output High Voltage

I

OH 

= –4 mA

2.4

V

Single edge is required to 
be monotonic when transi-
tioning through this region.

V

OL

 Output Low Voltage

I

OL 

= 4 mA

0.4

V

Single edge is required to 
be monotonic when transi-
tioning through this region.

C

IN

Input Pin Capacitance

5

pF

C

OUT

Output Pin Capacitance

6

pF

L

IN

Pin Inductance

7

nH

T

A

Ambient Temperature

0

70

°C

No air flow

I

DD1

Supply Current 

@ 66 MHz

50

mA

I

DD2

Supply Current 

@ 48 MHz

40

mA

I

PD

Power Down Supply Current

500

µ

A

Table 7. AC Parameters (T

A

 = 0°C to +70°C, V

DD

 = 3.3V ± 5%) 

Parameter

Description

Conditions

Min.

Max.

Unit

Notes

t

HIGH

CLK High Time, 48MHz

Measured @2.4V

9.45

10.95

ns

Specification applies to 
48MHz output mode.

t

LOW

CLK, Low Time, 48MHz

Measured @0.4V

8.50

10.10

ns

Specification applies to 
48MHz output mode.

t

HIGH

CLK High Time, 66MHz

Measured @2.4V

6.85

7.90

ns

Specification applies to 
66.7MHz output mode.

t

LOW

CLK Low Time, 66MHz

Measured @0.4V

5.95

6.95

ns

Specification applies to 
66.7MHz output mode.

t

RISEH1

Rising Edge Rate

Measured from 0.4V to 2.4V
REFOUT and CLOCKOUT

2.0

5.0

V/ns

High Buffer Strength
Refer to I

2

C Control

t

FALLH1

Falling Edge Rate

Measured from 2.4V to 0.4V
REFOUT and CLOCKOUT

2.0

5.0

V/ns

High Buffer Strength
Refer to I

2

C Control

t

RISEL1

Rising Edge Rate

Measured from 0.4V to 2.4V
REFOUT and CLOCKOUT

1.33

4.0

V/ns

Low Buffer Strength
Refer to I

2

C Control

[+] Feedback 

Summary of Contents for CY25822-2

Page 1: ...ter I2 C programmability 500 A power down current SpreadSpectrumforbest electromagnetic interference EMI reduction 8 pin SOIC package Block Diagram Pin Configuration 1 2 3 4 8 7 6 5 C LK IN V D D G N...

Page 2: ...is 11010100 D4h Pin Description Pin No Pin Name Pin Type Pin Description 1 CLKIN Input 48 MHz or 66 MHz Clock Input 2 VDD Power Power Supply for PLL and Outputs 3 GND Ground Ground for Outputs 4 CLKO...

Page 3: ...yte operation bits 6 0 of the command code represents the offset of the byte to be accessed 19 Acknowledge from slave 19 Acknowledge from slave 20 27 Data byte from master 8 bits 20 Repeat start 28 Ac...

Page 4: ...topped in the driven state are driven low The CLKIN input must be on and within specified operating parameters before PWRDWN is asserted and it must remain in this state while PWRDWN is asserted 0 1 0...

Page 5: ...shutdown clock is driven low ALL clocks need to be stopped in a predictable manner All clocks need to be shutdown without any glitches or other abnormal behavior while transitioning to a stopped stat...

Page 6: ...Single edge is required to be monotonic when transi tioning through this region CIN Input Pin Capacitance 5 pF COUT Output Pin Capacitance 6 pF LIN Pin Inductance 7 nH TA Ambient Temperature 0 70 C N...

Page 7: ...sured from 2 4V to 0 4V REFOUT and CLOCKOUT 0 5 1 5 ns Low Buffer Strength Refer to I2 C Control TCYC1 Cycle to Cycle Jitter REFOUT 500 ps SSCG is ON TCYC2 Cycle to Cycle Jitter CLOCKOUT 250 ps SSCG i...

Page 8: ...ay reasonably be expected to result in significant injury to the user The inclusion of Cypress Semiconductor products in life support systems application implies that the manufacturer assumes all risk...

Page 9: ...ev Page 9 of 9 Document History Page Document Title CY25822 2 CK SSC Spread Spectrum Clock Generator Document Number 38 07531 REV ECN NO Issue Date Orig of Change Description of Change 124462 03 19 03...

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