Effective 2/2/2001
Page 16
I.L. 70C1037H03
Figure 3.1 Block Diagram with Breaker Interface
(Load/
Lower)
(L
ine/
Upper)
N
A
B
C
AUX C
T s
Resid
ual
Groun
d
Detec
tio
n
Typi
cal
Phas
e or
Groun
d Sens
ing
Resist
or
Brid
ge
Circ
uits
Inter
nal
Pow
er
Suppl
y
Makin
g C
urr
ent
Releas
e Circ
uitr
y
(S
ee S
ect
io
n 3.3
)
Trip
Act
uator
LED
Pulse
Circ
uit
Batte
ry
+ 3V
Ground A
lar
m
Pow
er Su
pply
Optio
nal
for 5
20M
Re
quire
d fo
r 52
0MC
FET
Trip
(S
ee
Se
ction 1
.2)
Trip
LE
D
Rating P
lug
Int
egrated
Proce
ssor
C
ip H
TM
Cust
om
Desig
ned
TA
Stat
us L
ED
(S
ee
Se
ction 3
.2)
(S
ee S
ect
ion 7.
0)
(S
ee Se
ction
2.3)
(S
ee S
ect
ion 3.
4)
Zone In
terlock
Circ
uitr
y
Disp
la
y for
520
M/M
C
ZIn
ZOut
Curre
nt S
ens
ors
(S
ee
Se
ction 8
)
(S
ee
Sec
tion 4
.0)
Prot
ect
ion
Setti
ng
4 bit
Latch
Chip
