Curtiss-Wright FibreXtreme SL240, Hardware Reference Manual

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OPERATION
4.2 Theory of Operation
The operation of SL240 cards is simple—take data from the host bus interface and
transmit it across a link, or take data from the link and pass it to the host bus interface.
The link protocol involved is kept minimal to reduce the latency and improve throughput,
while still providing a set of useful features with which to customize your applications.
The hardware offers many different features for advanced applications, while maintaining
a simple interface to the most commonly used features.
4.2.1 Receive Operation
The SL240 card has several options for receiving data. The most basic option is no-loop
operation with data-receive enabled. In this case, data is:
1. Received from the link.
2. Decoded by the card.
3. Placed in the receive FIFO.
At this point, the operation depends on the host interface.
If it is a PCI-based card and a receive DMA is started, the data is automatically moved
into the PCI address given by the DMA transaction. If no DMA is started, the data waits
in the receive FIFO until the host either PIOs the data out or sets up the DMA transaction
to remove it.
If it is an FPDP-based card, and /SUSPEND is not asserted, the card asserts /DVALID
and proceeds to transmit the data on the FPDP interface. If /SUSPEND or /NRDY is
asserted, then the data waits in the receive FIFO until these signals go away.
FPDP signals are embedded into the control words of a frame. The FPDP signals
transported across are: /NRDY, /DIR, /SYNC, PIO1 and PIO2. A /SUSPEND signal is
synthesized by the transmit state machine in response to how full the receive FIFO is—
this is not the /SUSPEND from an FPDP port.
All FPDP signals, with the exclusion of /SYNC, are passed around the receive FIFO, and
are not synchronized with the data stream. For PCI variations of this card, the FPDP
signals can be read from a register once they are received from the link.
4.2.2 Transmit Operation
The transmit operation first has to collect data in the transmit FIFO for transmission. On
PCI-based cards, this means that either data is PIO’d into the Transmit FIFO or a DMA
transaction is set up to fill the FIFO. FPDP cards collect any data words accompanied by
/DVALID on the FPDP interface. Once a data word is in the FIFO, transmission can
begin. The framing-state machine first checks that there is no data in the retransmit FIFO
and that the remote node is not telling this node to back off. If it is clear to send, after it
transmits the next SOF it will begin filling the data frame as full as possible (up to 2048
bytes). The data is then encoded and sent out across the link. If there is data in the
Retransmit FIFO or the card is being backed off from the destination, then the card waits
until both conditions are clear before it starts transmission. Note that SYNC and SWDV
can also be transmitted by the link logic and these two types of synchronization
primitives are handled by the Transmit FIFO and transmit control logic in a similar
method as standard data. Specifically, they are written to the link logic through the same
interface, passed through the same internal link logic path, and are used in the assembly
of link frames in a similar fashion, although the maximum frame size does differ for these
types of associated Serial FPDP frames.
Copyright 2006 4-2 FibreXtreme Hardware Reference Manual