CHAPTER 8 - BIOS Setup
114
SPI-8450-LLVA
POST
(hex)
Description
0Eh
Test F000h segment shadow to see whether it is R/W-able or not. If test fails, keep beeping
the speaker.
0Fh
Reserved
10h
Auto detect flash type to load appropriate flash R/W codes into the run time area in F000 for
ESCD & DMI support.
11h
Reserved
12h
Use walking 1’s algorithm to check out interface in CMOS circuitry. Also set real-time clock
power status, and then check for override.
13h
Reserved
14h
Program chipset default values into chipset. Chipset default values are MODBINable by
OEM customers.
15h
Reserved
16h
Initial Early_Init_Onboard_Generator switch.
17h
Reserved
18h
Detect CPU information including brand, SMI type (Cyrix or Intel
®
) and CPU level (586 or
686).
19h
Reserved
1Ah
Reserved
1Bh
Initial interrupts vector table. If no special specified, all H/W interrupts are directed to
SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR.
1Ch
Reserved
1Dh
Initial EARLY_PM_INIT switch.
1Eh
Reserved
1Fh
Load keyboard matrix (notebook platform)
20h
Reserved
21h
HPM initialization (notebook platform)
22h
Reserved
Summary of Contents for SPI-8450-LLVA
Page 7: ...Table of Contents vi SPI 8450 LLVA...
Page 37: ...CHAPTER 3 Jumper setting 30 SPI 8450 LLVA...
Page 43: ...CHAPTER 5 BIOS SETUP 36 SPI 8450 LLVA...
Page 79: ...CHAPTER 6 RAID Controller 72 SPI 8450 LLVA...
Page 97: ...CHAPTER 8 BIOS Setup 90 SPI 8450 LLVA 8 6 Integrated Peripherals...