6. Appendix
PT-955SxX User’s manual
71
SERIAL I/O Address and Register Function
The following table lists the I/O addresses in case of SERIAL A.
Table 6.4. I/O Address
I/O address
DLAB
Read/Write
Register
03F8H
0
W
Transmitter holding register
THR
R
Receive buffer register
RBR
1
W
Divisor latch register (LSB)
DLL
03F9H
1
W
Divisor latch register (MSB)
DLM
0
W
Interrupt enable register
IER
03FAH
X
R
Interrupt ID register
IIR
03FBH
X
W
Line control register
LCR
03FCH
X
W
Modem control register
MCR
03FDH
X
R
Line status register
LSR
03FEH
X
R
Modem status register
MSR
03FFH
X
R/W
Scratch register
SCR
DLAB (Divisor Latch Access Bit) : The value in bit 7 of the line control register.
Summary of Contents for PT-955SHX
Page 1: ...IPC Series PANEL PC 955S Series Fanless Atom N2600 1 60GHz User s Manual CONTEC CO LTD...
Page 7: ...vi PT 955SxX User s manual...
Page 29: ...3 Hardware Setup 22 PT 955SxX User s manual...
Page 39: ...4 Each Component Function 32 PT 955SxX User s manual...
Page 71: ...5 BIOS Setup 64 PT 955SxX User s manual...
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