6.8 Boot Strap Signals
Table 36
Boot Strap signal Descriptions
Signal
Description of Boot Strap
Signals
I/O
PU/PD
Comment
AC_SYNC
Serial Bus Synchronization.
O 3.3V
PU 10k 3.3V AC_SYNC is a boot strap signal (see
caution statement below)
AC_SDOUT
Audio Serial Data Output to CODEC. O 3.3V
PU 10k 3.3V AC_SDOUT is a boot strap signal
(see caution statement below)
SUS_STAT#
Suspend Status: indicates that the
system will be entering a low power
state soon.
O 3.3V
PD 1k
SUS_STAT# is a boot strap signal
(see caution statement below)
DTR1#
Data terminal ready for COM1
O 5V
PU 4k7 5V
DTR1# is a boot strap signal (see
caution statement below)
TXD1, TXD2
Data transmit for COM1/COM2
O 5V
PU 4k7 5V
TXD1 and TXD2 are boot strap
signals (see caution statement
below)
RTS1#
Request to send for COM1
O 5V
PD 100k
RTS1# is a boot strap signal (see
caution statement below)
SIDE_A0..2
Secondary IDE Address bus
O 3.3V
SIDE_A0 to A2 are boot strap
signals (see caution statement
below)
Caution
The signals listed in the table above are used as chipset configuration straps during
system reset. In this condition (during reset), they are inputs that are pulled to the
correct state by either XTX
™
internally implemented resistors or chipset internally
implemented resistors that are located on the module. No external DC loads or external
pull-up or pull-down resistors should change the configuration of the signals listed in the
above table. External resistors may override the internal strap states and cause the
XTX
™
module to malfunction and/or cause irreparable damage to the module.
If it is necessary to drive a TTL input (or another input which sources or sinks significant
current) that uses the TXD1 signal, a CMOS-input buffer can be inserted in the signal
path so that this line is not pulled up or down by external circuitry during system reset.
Copyright © 2006 congatec AG
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