Table 24
TTL Flat Panel Interface Pinout
TTL Interface Pinout
Pin
Signal
Pin
Signal
1
GND
2
GND
3
R
4
B
5
HSY
6
G
7
VSY
8
DDCK
9
DETECT# (*)
10
DDDA
11
B4
12
SHFCLK
13
B5
14
EN
15
GND
16
GND
17
B1
18
B3
19
B0
20
B2
21
GND
22
GND
23
G2
24
G5
25
G3
26
G4
27
GND
28
GND
29
R4
30
G1
31
R5
32
G0
33
GND
34
GND
35
R1
36
R3
37
R0
38
R2
39
VCC
40
VCC
41
FPDDC_DAT
42
VSYNC
43
FPDDC_CLK
44
BLON#
45
HSYNC
46
DIGON
47
COMP
48
Y
49
SYNC
50
C
Table 25
FDC Signal Descriptions
Signal
Description of FDC signals (shared with LPT)
I/O
PU/PD
Comment
FLPY#
Floppy Interface configuration input
N.A.
Not supported, see
section 4.3.5 for more
information.
RES
N.C.
N.A.
Not available
DENSEL
Density select: low = 250/300Kb/s high = 500/1000Kb/s
O 5V
INDEX#
Index signal
I 5V
TRK0#
Track signal
I 5V
WP#
Write protect signal
I 5V
RDATA#
Raw data read
I 5V
DSKCHG#
Disk change
I 5V
HDSEL#
Head select
O 5V
DIR#
Direction
O 5V
STEP#
Motor step
O 5V
DRV
Drive select
O 5V
MOT#
Motor select
O 5V
WDATA#
Raw write data
O 5V
WGATE#
Write enable
O 5V
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