Concurrent Technologies RCIM I User Manual Download

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RCIM User’s Guide

A-44

Figure A-67 RCIM I Programmable Interrupt Generator Register (PIG)

The PIG register identifies the programmable interrupts.

Offset: 3000

Bits

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9

Reserved

PIG

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Summary of Contents for RCIM I

Page 1: ...service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE IN...

Page 2: ...Real Time Clock and Interrupt Module RCIM User s Guide 0898007 600 December 2011 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 3: ...ublications Department This publication may not be reproduced for any other reason in any form without written permission of the publisher Concurrent Computer Corporation and its logo are registered t...

Page 4: ...d connectors as well as installation and configuration instructions Chapter 3 Functional Description provides the general operation user interfaces and configuration options for the clocks and interru...

Page 5: ...r references will display the corresponding text Clicking on Internet URLs provided in blue type will launch your web browser and display the web site Clicking on publication names and numbers in red...

Page 6: ...2 10 Oscillators 2 10 GPS Antenna 2 10 External Interrupt I O Connector 2 10 System Identification 2 12 Daisy Chain Cable 2 12 RCIM I 2 13 Board Illustration 2 13 Connectors and LEDs 2 14 LED Functio...

Page 7: ...nition Logic 3 9 Setting up Distributed Interrupts 3 10 Obtaining RCIM Values 3 11 Edge Triggered Interrupts 3 12 ETI Configuration 3 12 ETI Device Files 3 13 User Interface to ETIs 3 13 Distributed E...

Page 8: ...able Interrupt Routing Registers CIRR A 7 Figure A 6 RCIM III PPS Snapshot Register PPS A 8 Figure A 7 RCIM III Cable Snapshot Register CSR A 8 Figure A 8 RCIM III Cable Master Time Register CMTR A 8...

Page 9: ...ock Seconds Register PCS A 31 Figure A 47 RCIM II POSIX Clock Nanoseconds Register PCN A 31 Figure A 48 RCIM II POSIX Clock Status Control Register PCSC A 32 Figure A 49 RCIM II POSIX Clock Skip Add T...

Page 10: ...an RCIM chain on multiple systems can share a common time base It also provides a local POSIX 1003 1 compliant high resolution clock An optional GPS module allows alignment of the clock to GPS standar...

Page 11: ...mmable Oscillator stability 2 5 PPM 20 PPM 100 PPM Local Interrupts External Edge Triggered Interrupts 12 12 4 External Output Interrupts 12 12 4 Real Time Clocks 8 8 4 Distributed Interrupts Input 12...

Page 12: ...iptions of the RCIM III RCIM II and RCIM I boards RCIM II and RCIM I boards mount in a standard PCI slot and the RCIM III board mounts into a standard PCI e slot on a host system A connector is mounte...

Page 13: ...III board with optional high stability OCXO Oven Controlled Crystal Oscillator and GPS modules installed Figure 2 1 RCIM III Board GPS Module Connectors Oven Controlled Crystal Oscillator Artisan Tech...

Page 14: ...ure 2 2 RCIM III Connectors and LED Locations LED Functions 1 There are two bi colored status LEDs near the input and output connectors on the RCIM III board They will both glow dimly RED when the boa...

Page 15: ...RCIM III powered down See the Installa tion section for ESD caution Care should be taken to insure that the SFP modules lock into position and that the RCIM III is not pushed out of its PCIe slot duri...

Page 16: ...O Connector 1 The external interrupt I O connector on the RCIM III is a Molex LFH 60 Low Force Helix that provides twelve outputs and twelve inputs The external outputs allow equipment to be attached...

Page 17: ...f the external interrupt signals and helps prevent noise from causing spurious interrupts Since most line drivers can sink more current than they can source the falling edge of the signal will be fast...

Page 18: ...a failing link The serial cables are point to point connections The input cable refers to the cable going upstream towards the master RCIM The output cable is the downstream connection away from the m...

Page 19: ...mers since the cable clock will not reach all of the systems Refer to Chapter 3 for instructions for synchronizing clocks RCIM II 1 Board Illustration 1 Figure 2 4 shows the RCIM II board with optiona...

Page 20: ...Failure Green Activity LED 2 Cable status off cable not connected yellow cable connected but not synchronized green cable connected and synchronized RJ45 Input Cable Connector LED 3 Always flashing g...

Page 21: ...lite signals and passes them to the receiver The GPS signals are spread spectrum signals in the 1575 MHz range and do not penetrate conductive or opaque surfaces Therefore the antenna must be located...

Page 22: ...the speed of the external interrupt signals and helps prevent noise from causing spurious interrupts Since most line drivers can sink more current than they can source the falling edge of the signal...

Page 23: ...the cable going upstream towards the master RCIM The output cable is the downstream connection away from the master RCIM Input cable disconnected RCIM Input cable connected RCIM Input cable connected...

Page 24: ...This section provides illustrations and descriptions of the RCIM I board Board Illustration 1 Figure 2 7 shows the RCIM I board Figure 2 7 RCIM I Board Connectors Artisan Technology Group Quality Inst...

Page 25: ...the output cable connector P2 and the external interrupts connector P4 They function as follows LED Number Function Red DS1 If on after reset indicates RCIM module failed power up reset Yellow DS2 If...

Page 26: ...n RCIM chain see page 2 18 for a description of RCIM modes The cable attached to the output cable connector is called a synchronization cable part no 6010178 109 The pin outs for the output cable conn...

Page 27: ...he external interrupts connector on the RCIM I provides four outputs and four inputs The external outputs allow equipment to be attached and controlled by the RCIM The outputs are driven by a multiple...

Page 28: ...P6 1 The in system programming interface connector is intended for use on the Concurrent Computer Corporation manufacturing floor and should not be used outside of that environment System Identificati...

Page 29: ...ated mode There are no connections to any other RCIM Master mode The RCIM is at the head of a chain of RCIMs There is no cable connection going into this RCIM only a cable connection going out The RCI...

Page 30: ...rap available at electronic stores that is attached to an unpainted metal part of the system chassis Use the following procedure to install an RCIM in your system 1 Ensure that your system is powered...

Page 31: ...SIONSThis parameter allows other drivers to attach their own interrupt routines to the RCIM driver The Frequency based Scheduler FBS requires this support For complete information about modifying kern...

Page 32: ...ce the RCIM is registered as a clocksource it cannot be unregistered Also if the RCIM is configured as a module and registered as a clocksource the module will be locked in rmmod rcim will fail On RCI...

Page 33: ...r different from established defaults the desired configuration options must be specified When distributing interrupts across the systems in an RCIM chain all systems must have a compatible configurat...

Page 34: ...p to GPS You may wish to include your local country code before pool in these entries for best results e g 0 us pool ntp org See www pool ntp org for more information server 0 pool ntp org server 1 po...

Page 35: ...olumn shows how frequently this server is being polled The when column is the time in seconds since the last poll The reach column is a bitmap in octal which shows if recent polls have been successful...

Page 36: ...379423 N lon 71 531318 W alt 88 35m trimble_tracking_status 15 ch 7 acq ACQ eph 3 signal_level 3 00 elevation 28 28 azimuth 311 83 collecting data trimble_tracking_status 09 ch 4 acq ACQ eph 3 signal...

Page 37: ...RCIM User s Guide 2 26 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 38: ...IM chain The open 2 close 2 and ioctl 2 system calls are used to manipulate the interrupts Separate device files are associated with each interrupt The clocks and interrupts are described in this chap...

Page 39: ...he common clock signal On RCIM III and RCIM II systems the system clock is synchronized to the POSIX clock For RCIM II and III setting the system clock for example with clock_settime 2 will set both t...

Page 40: ...o reset the tick clocks on all connected RCIMs to zero to provide a common time stamp across the system This synchronization operation occurs automatically when the RCIM master system boots As slave s...

Page 41: ...configuration option see Configuration in Chapter 2 cable signal is one of the following ENABLED DISABLED For the RCIM master indicates if the cable clock signal is being propagated to slaves For RCIM...

Page 42: ...er for synchronization to resume RedHawk must detect that both the system clock and the RCIM POSIX clock are incrementing that each clock is incrementing at the correct rate and that each clock has a...

Page 43: ...oneshot line in etc sysconfig rcim on the slave Subsequently each time the slave is booted it will run rcimdate either once or continuously If it is run once then the slave s POSIX clock will match th...

Page 44: ...eceiver This symbolic link is pointed to the last RCIM found with a GPS If another RCIM is to be used the administrator must point this special device to the uart special device file of the desired RC...

Page 45: ...tically generate a signal that can be used to trigger interrupts Documentation for PIGs begins on page 3 16 Distributed Interrupts DIs Distributed interrupts allow you to distribute signals or interru...

Page 46: ...st clears the pending bit each time it concludes the processing of an interrupt This clears the way for the RCIM board to output the next instance of this interrupt Arming and Enabling DIs and ETIs 1...

Page 47: ...device via OUT0 Note that on RCIM III and RCIM II the local interrupt does not drive the configured DI An ETI_REQUEST ioctl will cause a local interrupt but will not affect the DI associated with the...

Page 48: ...write interrupts a count of all ETI DI and RTC interrupts per CPU and in total status miscellaneous RCIM board status and time synchronization rawregs named hex display of all readable RCIM board reg...

Page 49: ...rement the RCIM imposes on external signal generating equipment is that the signals they output must hold any low or high signal value for at least 1 5 microseconds before changing to the next state P...

Page 50: ...ETIs These commands can also be applied to DIs All ioctl calls use the constants defined in usr include rcim h Refer to the rcim_eti 4 man page for more information ETI_ARM arms the ETI ETI_DISARM di...

Page 51: ...ginal load value is automatically reloaded into the counter each time zero is reached In addition to being able to generate an interrupt on the host system the output of an RCIM real time counter can...

Page 52: ...clock count RTCIOCGETCNT gets RTC clock count RTCIOCRES gets RTC clock resolution RTCIOCSTART starts RTC counting RTCIOCSTOP stops RTC counting RTCIOCWAIT blocks until RTC clock count reaches zero RT...

Page 53: ...ignal onto a distributed interrupt line permitting user software to generate distributed interrupts that are simultaneously delivered to all RCIMs in an RCIM chain RCIM III and RCIM II support twelve...

Page 54: ...tion entitled Obtaining RCIM Values earlier in this chapter See the Distributed Interrupts section below for information about setting up distributed interrupts Distributed Interrupts 1 The real heart...

Page 55: ...ed to trigger on the rising or falling edge of a signal or on a high or low signal value using the di configuration option This option has the following syntax diN rising falling high low The flag wor...

Page 56: ...tl calls use the constants defined in usr include rcim h Refer to the rcim_distrib_intr 4 man page for more information DISTRIB_INTR_ARM arms the DI DISTRIB_INTR_DISARM disarms the DI DISTRIB_INTR_ENA...

Page 57: ...RCIM User s Guide 3 20 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 58: ...0xXXXX0050 Interrupt Select Level Register 1 ISLR1 0xXXXX0054 Interrupt Select Level Register 2 ISLR2 0xXXXX0060 Interrupt Select Polarity Register 1 ISPR1 0xXXXX0064 Interrupt Select Polarity Regist...

Page 59: ...C 4 Repeat RTC4R 0xXXXX20A0 RTC 5 Control RTC5C 0xXXXX20B0 RTC 5 Timer RTC5T 0xXXXX20B4 RTC 5 Repeat RTC5R 0xXXXX20C0 RTC 6 Control RTC6C 0xXXXX20D0 RTC 6 Timer RTC6T 0xXXXX20D4 RTC 6 Repeat RTC6R 0xX...

Page 60: ...ble Clock Stop R W diag Cable Clock Missing R RCIM Mode Bit Values Bits 1 0 Description Input Cable Output Cable Cable Clock 1 1 Stand alone Master RCIM Open Open Inactive 1 0 Master RCIM Open Connect...

Page 61: ...on this RCIM board and the firmware revision Offset 00004 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved Firmware Revision R External Oscillato...

Page 62: ...h 1 or low 0 for the selected interrupts Offsets IER1 0010 IER2 0014 IRR1 IPR1 0020 IRR2 IPR2 0024 ICR1 0030 ICR2 0034 IAR1 0040 IAR2 0044 ISLR1 0050 ISLR2 0054 ISPR1 0060 ISPR2 0064 Register 1 Bits 3...

Page 63: ...le Interrupt 0 0x11 Cable Interrupt 1 0x12 Cable Interrupt 2 0x13 Cable Interrupt 3 0x14 Cable Interrupt 4 0x15 Cable Interrupt 5 0x16 Cable Interrupt 6 0x17 Cable Interrupt 7 0x18 Cable Interrupt 8 0...

Page 64: ...erved 0x11 Reserved 0x21 Reserved 0x02 Reserved 0x12 Reserved 0x03 Reserved 0x13 Reserved 0x27 Reserved 0x04 RTC 0 0x14 RTC 4 0x28 Edge Interrupt 8 0x05 RTC 1 0x15 RTC 5 0x29 Edge Interrupt 9 0x06 RTC...

Page 65: ...r time is received Offset 0210 Figure A 8 RCIM III Cable Master Time Register CMTR The Cable Master Time register contains the seconds field of the master RCIM POSIX clock that is transmitted on the c...

Page 66: ...ertaining to the output cable Offset 0410 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Clear Cable Errors Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 1...

Page 67: ...ick clock Offset 1000 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved Transmit Loss of Lock Receiver Loss of Lock Receiver Loss of Sync Rec...

Page 68: ...tick clock Offset 1010 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Tick Clock lower 32 bits Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 1...

Page 69: ...er PCN This register contains the POSIX clock nanoseconds Offset 1108 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POSIX Clock seconds Bits 31 30 29 28 27...

Page 70: ...IX clock in 400 nanosecond increments Offset 1114 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved Cable Enable R Local Enable R W Select Ca...

Page 71: ...RTC3T 2070 RTC4T 2090 RTC5T 20B0 RTC6T 20D0 RTC7T 20F0 Figure A 21 RCIM III RTC Repeat Registers RTCR The RTC repeat registers contain the repeat count value Offsets RTC0R 2014 RTC1R 2034 RTC2R 2054...

Page 72: ...24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Res Reserved Resolution R W Repeat R W Resolution Bit Values Bits 22 21 20 Description 0 0 0 1 microsecond 0 0 1 10 microsecon...

Page 73: ...ese registers sets clears the unitary bits in the Programmable Interrupt Register without affecting the other bits Offsets PIGS 3010 PIGC 3020 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1...

Page 74: ...ers GRXP The GPS receive pointers are used for communication with the optional GPS module Offset 3200 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Bit...

Page 75: ...Setting any of these bits will disable RCIM communication with the GPS module Offset 3208 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved Bits...

Page 76: ...3FFF Figure A 31 RCIM III GPS Receive Data Buffer GRDB This is the GPS receive data buffer Offset 4000 to 47FF 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Re...

Page 77: ...GRDB This is the GPS trasmit data buffer Offset 4800 to 4FFF Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 GPS Transmit Data Buffer Artisan Technology Grou...

Page 78: ...er 2 ISPR2 0xXXXX0070 External Interrupt Routing Register 1 EIRR1 0xXXXX0074 External Interrupt Routing Register 2 EIRR2 0xXXXX0078 External Interrupt Routing Register 3 EIRR3 0xXXXX0080 Cable Interru...

Page 79: ...XX2070 RTC 3 Timer RTC3T 0xXXXX2074 RTC 3 Repeat RTC3R 0xXXXX2080 RTC 4 Control RTC4C 0xXXXX2090 RTC 4 Timer RTC4T 0xXXXX2094 RTC 4 Repeat RTC4R 0xXXXX20A0 RTC 5 Control RTC5C 0xXXXX20B0 RTC 5 Timer R...

Page 80: ...le Clock Stop R W diag Cable Clock Missing R RCIM Mode Bit Values Bits 1 0 Description Input Cable Output Cable Cable Clock 1 1 Stand alone Master RCIM Open Open Inactive 1 0 Master RCIM Open Connecte...

Page 81: ...on this RCIM board and the firmware revision Offset 00004 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved Firmware Revision R External Oscillat...

Page 82: ...gh 1 or low 0 for the selected interrupts Offsets IER1 0010 IER2 0014 IRR1 IPR1 0020 IRR2 IPR2 0024 ICR1 0030 ICR2 0034 IAR1 0040 IAR2 0044 ISLR1 0050 ISLR2 0054 ISPR1 0060 ISPR2 0064 Register 1 Bits...

Page 83: ...le Interrupt 0 0x11 Cable Interrupt 1 0x12 Cable Interrupt 2 0x13 Cable Interrupt 3 0x14 Cable Interrupt 4 0x15 Cable Interrupt 5 0x16 Cable Interrupt 6 0x17 Cable Interrupt 7 0x18 Cable Interrupt 8 0...

Page 84: ...served 0x11 Reserved 0x21 Reserved 0x02 Reserved 0x12 Reserved 0x03 Reserved 0x13 Reserved 0x27 Reserved 0x04 RTC 0 0x14 RTC 4 0x28 Edge Interrupt 8 0x05 RTC 1 0x15 RTC 5 0x29 Edge Interrupt 9 0x06 RT...

Page 85: ...sizer Adjust register loads the 32 bit frequency control word into the onboard AD9851 DDS Offset 0100 PCI Interrupt Routing Register 1 PARR1 PBRR1 PCRR1 PDRR1 Bits 31 30 29 28 27 26 25 24 23 22 21 20...

Page 86: ...bus interface Offset 0300 Figure A 42 RCIM II Clear Cable Errors Register CCERR This is a Write Only register that clears any reported cable errors The data field is don t care Offset 0400 Bits 31 30...

Page 87: ...f the tick clock Offset 1010 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Tick Clock upper 32 bits Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15...

Page 88: ...N This register contains the POSIX clock nanoseconds Offset 1108 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POSIX Clock seconds Bits 31 30 29 28 27 26 2...

Page 89: ...POSIX clock in 400 nanosecond increments Offset 1114 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Reserved Cable Enable R Local Enable R W Select...

Page 90: ...0B0 RTC6T 20D0 RTC7T 20F0 Figure A 51 RCIM II RTC Repeat Registers RTCR The RTC repeat registers contain the repeat count value Offsets RTC0R 2014 RTC1R 2034 RTC2R 2054 RTC3R 2074 RTC4R 2094 RTC5R 20B...

Page 91: ...25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Res Reserved Resolution R W Repeat R W Resolution Bit Values Bits 22 21 20 Description 0 0 0 1 microsecond 0 0 1 10 micros...

Page 92: ...egisters sets clears the unitary bits in the Programmable Interrupt Register without affecting the other bits Offsets PIGS 3010 PIGC 3020 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13...

Page 93: ...rupt Select Polarity Register ISPR 0xXXXX0070 ExternalInterruptRoutingRegister EIRR 0xXXXX0080 Cable Interrupt Routing Register CIRR 0xXXXX1000 Tick Clock Upper TCU 0xXXXX1008 Tick Clock Lower TCL 0xX...

Page 94: ...2 11 10 9 8 7 6 5 4 3 2 1 0 RCIM Version R Reserved Res Res Cable Clock Stop R W diag Cable Clock Enable R W Cable Clock Missing R RCIM Mode R RCIM Mode Bit Values Bits 1 0 Description Input Cable Out...

Page 95: ...nterrupt for edge triggering The level register ISLR sets level 1 or edge 0 for the selected interrupt The polarity register ISPR sets polarity high 1 or low 0 for the selected interrupt Offsets IER 0...

Page 96: ...6 5 4 3 2 1 0 Value Description 0x00 None 0x01 Reserved 0x02 Reserved 0x03 Reserved 0x04 RTC 0 0x05 RTC 1 0x06 RTC 2 0x07 RTC 3 0x08 Edge Interrupt 0 0x09 Edge Interrupt 1 0x0A Edge Interrupt 2 0x0B...

Page 97: ...0 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 Value Description 0x0 None 0x1 Reserved 0x2 Reserved 0x3 Reserved 0x...

Page 98: ...tick clock Offset 1010 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Tick Clock upper 32 bits Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 1...

Page 99: ...control of the POSIX clock Offset 1110 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POSIX Clock seconds Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17...

Page 100: ...3 2070 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Res Reserved Resolution R W Repeat R W Resolution Bit Values Bits 22 21 20 Description 0 0 0...

Page 101: ...egister PIG The PIG register identifies the programmable interrupts Offset 3000 Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved PIG Artisan Technolo...

Page 102: ...s powered off the cable clock will not be propagated to the slaves downstream from it In this case the downstream slaves will use their local oscillator instead of the cable clock The user just needs...

Page 103: ...ugh the cable is 2ns per foot It would take 20ns to travel ten feet 2ns ft 10ft 20ns Cable lengths should be minimized when possible They do not need to have equal length The equation below describes...

Page 104: ...e or high temperature environments should be avoided when planning RCIM cable routes Note that if a pass through slave system is powered off the cable clock will not be propagated to the slaves downst...

Page 105: ...RCIM User s Guide B 4 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 106: ...I 2 10 RCIM III 2 4 clock registers A 11 A 30 A 41 clock synchronization 2 21 3 3 clocks description 3 1 direct access 3 3 GPS 2 23 3 6 clocksource 2 20 2 21 close system call 3 1 configuration inform...

Page 107: ...I initialization 2 20 input cable connector RCIM I 2 14 2 16 RCIM II 2 8 2 10 RCIM III 2 4 installation instructions 2 19 In System Programming Interface Connector P6 RCIM I 2 17 interrupt handling 3...

Page 108: ...A 3 registers 3 11 related publications iv RTCs device files 3 14 distributed 3 14 example 3 10 overview 3 14 registers A 14 A 15 A 33 A 34 A 43 user interface 3 15 S signal processing logic 3 8 overv...

Page 109: ...Index 4 RCIM User s Guide Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 110: ...Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 111: ...Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 112: ...service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE IN...

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