CDM-600L Satellite Modem
Revision 0
Functional Description
MN/CDM600L.IOM
3–2
Following this, the data passes to the Plesiochronous/Doppler buffer, which has a
programmable size, or alternatively bypasses the buffer. From here, the receive clock and
data signals are routed to the terrestrial interface, and are passed to the externally
connected DTE equipment.
Physically the CDM-600L modem is comprised of two main card assemblies.
•
The first of these is the baseband framer card, which includes all of the interface
circuits, the framer/de-framer, plesiochronous/Doppler buffer, Reed Solomon
outer codec, and the main microcontroller.
•
The second card is the modem itself, that performs all of signal processing
functions of modulation, demodulation, and Forward Error Correction.
These functions are shown in Figure 3-1.
Figure 3-1. CDM-600L Modem Block Diagram
LVDS
INTERFACE
TX FRAMING
(IBS, IDR, D&I
OR EDMAC)
TX REED-
SOLOMON
WITH
SCRAMB-
LER
SEQ
ENCODER
TX G703 T1/E1
DEFRAMER AND
INTERFACE
RS-422, V.35 OR
RS-232
INTERFACE
G703 T2/E2
INTERFACE
TX LINE
DECODING
RX G703 T1/E1
DEFRAMER AND
INTERFACE
IBS OR
EDMAC
SCRAM-
BLER
MUX
DEMUX
INT CLK
DDS
ENC CLK
DDS
PL/9076
BASEBAND
FRAMING
CARD
AS/0424
MODEM
CARD
I & Q FILTERS
TX IF
RX IF
RX REED-
SOLOMON
WITH DE-
SCRAMB-
LER
OVERHEAD
INTERFACES
TX AUDIO INTERFACE
IBS OR EDMAC
DESCRAMBLER
RX DE-FRAMING
(IBS, IDR, D&I OR
EDMAC)
RX AUDIO INTERFACE
BUFFER
INS CLK
DDS
RX LINE
ENCODING
INSERT
VITERBI
& TCM
CODEC
TURBO CODEC
W/ SCRAMBLER
& DESCRAMBLER
(OPTIONAL CARD)
SEQ
DEC-
ODER
VIT/SEQ/OM73
SCRAMBLERS
VIT/SEQ/OM73
DESCRAMBLERS
TXFIR
FIR/PD & I/Q
RECOVERY
SYM & BIT
TIMING
RECOVERY
DLF/NCO
MICROPROCESSOR
& PROCESSOR FPGA
BIT/SYM
DACS
CARRIER
DACS
INS CLK
DDS
BUFFER CLK
DDS
Summary of Contents for CDM-600L
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