CommTech FASTCOM ESCC-PCI-335 Hardware Reference Manual Download Page 30

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f O

f D

f TRM

f OSC

fDPLL fBRG fBRG/16 fRxCLK fTxCLK

f REC

f D

f B

f R

f T

2a/b

6a/b

0a/b

Core

Transmitter

Receiver

CCR0

MCE=1

CCR4

MCK=0

6a/b

7a/b

2a/b

3a/b

DPLL

16:1

BRG

Oscillator

Clock

Generator

(ICS307)

4:1

T+

T-

Board-specific register

Channel 1 - bits 8 & 9

Channel 2 - bits 10 & 11

Clocking Concept Block Diagram

Summary of Contents for FASTCOM ESCC-PCI-335

Page 1: ...derutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demos In stock Ready to ship TAR certified secure asset solutions Expert team I Trust guarantee I 100 satisfaction All trademarks brand names and brands appearing herein are the property of their respective own...

Page 2: ...F A ASTCOM DAPTERS FASTCOM ESCC PCI 335 High Speed Dual Channel Sync Async Interface for Universal PCI Bus Hardware Reference Manual Commtech Inc ...

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Page 4: ...produce this document or parts thereof in any form without permission in writing from Commtech Inc IBM is a registered trademark of International Business Machines Corporation Microsoft is a registered trademark of Microsoft Corporation WINDOWS is a trademark of Microsoft Corporation ...

Page 5: ...REVISION NOTES REVISION PAGE NUMBER CHANGES MADE 1 0 All Created manual ...

Page 6: ...ry Switch Settings 8 Software Installation 8 Testing the Installation Building the Loopback Plug 9 Windows 2000 XP Test 9 REFERENCE Switch Descriptions On Board Loopback Control Switch 12 Programming 13 RS 422 RS 485 14 Termination Resistance 15 PROGRAMMABLE CLOCK GENERATOR Cypress ICD2053B 16 DETERMINING AND SELECTING BAUD RATES 17 TECHNICAL SUPPORT 24 APPENDIX A Siemens SAB 82532 Technical Data ...

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Page 8: ...tion Technology Equipment 30 MHz 1 GHz Class B Limits EN 50082 1 1992 EMC Generic Immunity Standard Part 1 Residential Commercial and Light Industry IEC 801 2 1984 Method of Evaluating Susceptibility to Electrostatic Discharge Level 4 IEC 801 3 1984 Radiated Electromagnetic field Requirements Level 3 IEC 801 4 1988 Electrical Fast Transient Burst Requirements Level 2 Products listed on this declar...

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Page 10: ...c async channel on the FASTCOM ESCC PCI 335 has its own DPLL encoder decoder and programmable protocol support In addition a built in 64 byte FIFO provides the FASTCOM ESCC PCI 335 with a very high throughput as well as requiring less system CPU time than any other HDLC adapter The FASTCOM ESCC PCI 335 directly supports HDLC X 25 LAP B ISDN LAP D SDLC ASYNC and BISYNC protocols and features a high...

Page 11: ...apters can share the same twisted pair Driver control is automatic via the RTS line Serial Interface Internal or External Clock Source Asynchronous Monosync Bisync and HDLC SDLC data formatting 1X isosynchronous or 16X oversampling for Asynchronous format Different modes of data encoding NRZ NRZI FM0 FM1 Manchester CRC CCITT or CRC 32 for HDLC SDLC modes CRC CCITT or CRC 16 for BISYNC mode Modem c...

Page 12: ... R7 RED TRANSMIT ACTIVE CTS R29 R10 R9 GREEN RECEIVE ACTIVE ST R35 R14 R13 DCD R40 R27 R33 CHANNEL 1 RT R32 R12 R11 RD R23 R16 R15 RED TRANSMIT ACTIVE CTS R28 R18 R17 GREEN RECEIVE ACTIVE ST R34 R22 R21 DCD R39 R30 R38 CHANNEL 2 RT R31 R20 R19 PACKING LIST FASTCOM ESCC PCI 335 CARD CABLE ASSEMBLY FASTCOM CD If an omission has been made please call technical support for a replacement ...

Page 13: ...1RD 1CTS 1ST 1DCD 2SD 2RTS 2TT 1SD 1RTS 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 2RT 2DSR 1RT 2RD 2CTS 2ST 2DCD 1RD 1CTS 1ST 1DCD 2SD 2RTS 2TT 2DTR 1SD 1RTS 1TT 9 2CTS 1TT 1DTR The cable provided splits each channel from this DB37 to individual RS 530 pin out DB25 male connectors The DB25 pin outs are shown on the next page ...

Page 14: ...ESCRIPTION 422 TYPE CONNECTED TO 530 CIRCUIT 8 DATA CARRIER DETECT A DCD CF 10 DATA CARRIER DETECT B DCD CF 24 TRANSMIT CLOCK OUT A TT DA 11 TRANSMIT CLOCK OUT B TT DA 17 RECEIVE CLOCK IN A RT DD 9 RECEIVE CLOCK IN B RT DD 15 TRANSMIT CLOCK IN A ST DB 12 TRANSMIT CLOCK IN B ST DB These are opposite of RS 422 in order to invert the signals going to the FASTCOM ESCC PCI 335 The 530 specification sta...

Page 15: ...lank bracket from your PC install the FASTCOM ESCC PCI 335 in the PC by pressing it firmly into the slot Install the bracket screw to hold it firmly in place 5 Re install the cover on your PC FACTORY SWITCH SETTINGS ON 1 2 3 4 ON BOARD LOOPBACK CONTROL SW1 NO LOOPBACK SOFTWARE INSTALLATION Select the link above to open the Installation Manual Under FASTCOM ESCC PCI 335 select your operating system...

Page 16: ... one the clock circuit can be tested and two you will not have to change switch settings from the factory defaults In addition our technical support engineers can better service your technical questions if you have made the loop back plug If you have made the loop back plug do not change the setting of the Mode switch FASTCOM ESCC PCI 335 WINDOWS 2000 XP TEST 1 Attach a loopback plug to the cable ...

Page 17: ...test channel 1 in a similar manner by running D fastcom_disks esccp nt escctest esccptest 1 h Make sure that you move your loopback to cable 2 before running the test on channel 1 You can test other operating modes by changing the last letter Async test D fastcom_disks esccp nt escctest esccptest 0 a HDLC test D fastcom_disks esccp nt escctest esccptest 0 h Bisync test D fastcom_disks esccp nt esc...

Page 18: ...n green if it was a short message 32 bytes or so a long message will likely only get an RXD status indicator If when running any of these tests you do not get the expected result check your loopback plug Next check to make sure that the driver loaded and is running Watch the BIOS startup screen to verify that the system recognized that the card is present installed PCI devices are displayed on som...

Page 19: ...eled SW1 See Board Layout Illustration for location SWITCH 1 ON BOARD LOOPBACK CONTROL POSITION DESCRIPTION 1 TXD to RXD loopback for RS 485 channel 0 2 TXD to RXD loopback for RS 485 channel 0 3 TXD to RXD loopback for RS 485 channel 1 4 TXD to RXD loopback for RS 485 channel 1 ...

Page 20: ... configuration register PCR to E0H Always set the SAB 82532 interrupt port configuration IPC to 03H Always set the SAB 82532 CCR1 ODS bit to 1 SAB 82532 PVR Register The 82532 has an 8 bit I O port PVR that has the following functions on the FASTCOM ESCC PCI 335 Bit 0 Clock generator data 1 Clock generator clock 2 Clock generator strobe 3 DTR channel 1 output 4 DTR channel 2 output 5 DSR channel 1...

Page 21: ...D the receive signal RX in RS 232 consists of RD and RD Another draw back of RS 232 is that more than two devices cannot share a single cable This is also true of RS 422 and that s why the RS 485 standard was developed RS 485 offers all of the benefits of RS 422 and also allows multiple units up to 32 to share the same twisted pair RS 485 is often referred to as a multi drop or two wire half duple...

Page 22: ...lt in We have installed a terminator resistor for each receiver between each RD and RD and between CTS and CTS for each channel If you are using the FASTCOM ESCC PCI 335 in a multi drop network the termination resistor should be removed from all units except the first and last see the RS 485 illustration below Call for technical support if you need to modify the resistor You may also order the FAS...

Page 23: ...ate output control disables output for test purposes Sophisticated internal loop filter requires no external components or manufacturing tweaks as commonly required with external filters Low power consumption makes device ideal for power and space critical applications Programmable using the FASTCOM ESCC PCI 335 PVR register bits 0 and 1 see page 17 5V operation High speed CMOS technology PROGRAMM...

Page 24: ...r mode 7b is the most straightforward to work with The bitrate will be determined by the output of the baud rate generator The baud rate generator is clocked by the OSC input which is set by the programmable clock generator So you have If you are not using oversampling BCR 0 the formula is bitrate input clock BGR If you are using oversampling BCR 1 the normal case for async the formula is bitrate ...

Page 25: ...produce the same affect as setting it to 0x000 If you use the Enhanced baud rate generator and set m 0 the clock output will be asymmetric non 50 50 duty cycle An important fact about the clock generator There is only one programmable clock generator and only 1 OSC input to the 82532 chip The clock generator can be programmed from either channel ESCC0 or ESCC1 but it programs the same part The res...

Page 26: ...we need to generate transmit a clock that matches our transmitted data To achieve this we should set the 82532 to clock mode 0b Set the mode switch position 5 or 7 to on enabling the txclk output driver selecting txclk as an output on TT The baudrate function bitrate input clock N 1 2 will be used If there are no other constraints other than operating one channel at 19200 bps then we can select bo...

Page 27: ...te generator FIFO threshold is 32 bytes mandatory for NT driver in HDLC mode BGR 0xBF This sets the output clock rate to 19200 given that the input clock was previously set to 7 3728 MHz and the above registers are set as shown CCR0 CCR1 CCR4 and BGR are the most critical registers that effect the bitrate the rest are shown for completeness and depending on the system you can easily change some pa...

Page 28: ...4 0x80 and BGR 0x19 will yield an asynchronous data format with 16X oversampling at about 38400 bps If later you decide that you need to get 115200 bps on the async channel you will find 115200 32E6 16 N 1 2 N 7 68 Using N 7 bitrate 32E6 16 7 1 2 125000 bps Using N 8 bitrate 32E6 16 8 1 2 111111 bps The ideal situation would be to adjust the 32 MHz clock such that the deviation between the desired...

Page 29: ...on 5 SD 485 control 0 RTS controls SD 1 SD always on 6 TT 485 control 0 RTS controls TT 1 TT always on Channel 2 7 CTS disable 0 CTS always active 1 CTS from connector 8 Txclk ST 0 txclk connected to ST input 1 txclk not connected to ST input Channel 1 9 Txclk TT 0 txclk connected to TT output 1 txclk not connected to TT output 10 Txclk ST 0 txclk connected to ST input 1 txclk not connected to ST ...

Page 30: ... 4 3a 7a 0b 3b 7b 2b 6b 1 5 0a 2a 6a 4 2a b 3a 6a b 7a 3b 7b 0a b 1 5 Core Transmitter Receiver CCR0 MCE 1 0 CCR4 MCK 0 1 0b 6a b 7a b 2a b 3a b DPLL 16 1 BRG Oscillator Clock Generator ICS307 4 1 RxD RxCLK TxCLK RT RT TT TT ST ST Board specific register Channel 1 bits 8 9 Channel 2 bits 10 11 Clocking Concept Block Diagram ...

Page 31: ... the cause of damage Commtech will replace the unit at 60 of the then current list price Commtech provides extensive technical support and application suggestions Most of the problems that occur with the FASTCOM ESCC PCI 335 can be corrected by double checking the switch positions your cables and your program We recommend that you build the loop back plug that is described in the Programming secti...

Page 32: ...25 APPENDIX A SAB 82532 TECHNICAL DATA ...

Page 33: ...quipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentation Artisan Scientific Corporation dba Artisan Technology Group is not an affiliate representative or authorized distributor for any manufacturer listed herein We re here to make your life easier How...

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