Citizen CBM-202LA s Specifications Download Page 1

CONTROL IC FOR LINE THERMAL PRINTER

                                                                                      (FOR LT SERIES)

SPECIFICATIONS 

MODEL CBM-202LA

                                                      GATE ARRAY

Updated on Oct. 25, 1996

Japan CBM Corporation

                                                            Information Systems Div.

Summary of Contents for CBM-202LA s

Page 1: ...CONTROL IC FOR LINE THERMAL PRINTER FOR LT SERIES SPECIFICATIONS MODEL CBM 202LA GATE ARRAY Updated on Oct 25 1996 Japan CBM Corporation Information Systems Div ...

Page 2: ... 4 TERMINALS AND THEIR FUNCTIONS 8 4 5 POWER TERMINAL 10 4 6 INTERNAL ADDRESS MAP 11 4 7 PRINT DATA TRANSFER METHOD 12 4 8 RESET CIRCUIT 14 4 9 SYSTEM CLOCK CIRCUIT 15 4 10 HEAD VOLTAGE INTERRUPTING CIRCUIT 15 4 11 HEAD BREAK OFF DETECTING CIRCUIT 15 4 12 PARALLEL INPUT CIRCUIT 16 4 13 ADDRESS LATCH CIRCUIT 16 4 14 GENERAL PURPOSE I O OUTPUT CIRCUIT 17 4 15 BIT DATA PROCESSING METHOD 17 4 16 PSEUD...

Page 3: ...ting is made available x With strobe split control function being added printing is performed in small current x Strobe signal excursion function can protect Head safely x With the head resistance value measurement circuit being mounted head break off error can be detected x Parallel interface is available by use of the parallel input port x Address latch function is provided x The general purpose...

Page 4: ...on 6 PACKAGE SPECIFICATION 2 2 STRUCTURE C MOS LSI 2 3 OPERATING VOLTAGE 5V ur 10 DC 2 4 OPERATING FREQUENCY 16MHz r 5 2 5 ENVIRONMENTAL SPECIFICATIONS Temperature Operating temperature 40ºC 㨪 85ºC Storage temperature 65ºC 㨪 150 ºC 2 6 APPLICABLE MODELS LT280 LT380 series Printing system Thermal line dot system ...

Page 5: ...ent capacity thus can be reduced Switching in timing of current supply to these split blocks is automatically performed by the gate array This is also equipped with a circuit which serves to prevent the thermal head from being damaged on occurrence of strobe signal control failure due to CPU excursion etc 3 3 BIT DATA PROCESSING FUNCTION This product is further provided with data processing functi...

Page 6: ...0 7Vdd Vdd V Low Level Input Voltage Vil 0 0 3Vdd V Input Rise Fall Time tri tfi 0 200 ns Current Consumption Icc 30 mA 4 3 DIRECT CURRENT CHARACTERISTIC Unless otherwise specified Vdd 5V r10 Ta 40㨪 85ºC ITEM SYMBOL CONDITION MIN TYP MAX UNIT Static Current Consumption Static Current Consumption Off State Output Current Input Clamp Voltage Output Short Circuit Current Idds Idds Ioz Vic Ios Vi Vdd ...

Page 7: ...otherwise specified Vdd Vi 0V Ta 25ºC ITEM SYMBOL CONDITION MIN TYP MAX UNIT Input Terminal Cin f 1MHz 10 20 pF Output Terminal Cout 0V for those other than measured pins 10 20 pF I O Terminal Ci o 10 20 pF Note 1 CMOS level output buffer Vdd 5Vr10 Ta 40㨪 85 ºC Note 2 Output short circuit current is available only in 1 pin of LSI for 1 second or less Note 3 Provided with pull up resistance 50K ǡ N...

Page 8: ...pull up Data bus 21 D4 I O CMOS type with pull up Data bus 22 D5 I O CMOS type with pull up Data bus 23 D6 I O CMOS type with pull up Data bus 24 D7 I O CMOS type with pull up Data bus 25 Vdd VDD 26 PA17 Input CMOS type with pull up Preset SW input 27 PA16 Input CMOS type with pull up Preset SW input 28 PA15 Input CMOS type with pull up Preset SW input 29 PA14 Input CMOS type with pull up Preset S...

Page 9: ...eneral purpose output 60 Vdd VDD 61 PA05 Output CMOS13 5mA type with pull up Address latch output general purpose output 62 PA04 Output CMOS13 5mA type with pull up Address latch output general purpose output 63 PA03 Output CMOS13 5mA type with pull up Address latch output general purpose output 64 PA02 Output CMOS13 5mA type with pull up Address latch output general purpose output 65 PA01 Output ...

Page 10: ...Input CMOS type with pull up Gate array chip select 98 HWR Input CMOS type with pull up Write signal 99 RD Input CMOS type with pull up Read signal 100 RFSH Input CMOS type with pull up Refresh cycle input 4 5 POWER TERMINAL NO SYMBOL CONNECTION 1 GND Connected to GND 12 Vdd Connected to 5V 15 GND Connected to GND 16 GND Connected to GND 25 Vdd Connected to 5V 40 GND Connected to GND 41 Vdd Connec...

Page 11: ...I port input Centro data input 0 1 0 0 1 0 0 PC0 port output PBUSY 0 1 0 1 0 1 0 180 turning output 0 1 0 1 1 0 0 Bit data buffer for processing 0 1 1 0 0 1 0 Double width lower 8 bit output 0 1 1 0 1 0 0 0 1 1 1 0 1 0 Double width upper 8 bit output 0 1 1 1 1 0 0 Head control mode register 1 X X X 0 1 0 90 turning output 1 X X X 1 0 0 90 turning data buffer X X X X X X 1 Data bus high impedance X...

Page 12: ...Mode Registers are set to 0 1 to assign pre pulse 3 DMA request is given With OFFh being written in Address XX01h one shot from DRQ pin is output DRQ signal is a request of 1 byte DMA transfer 4 Print data developed beforehand from CPU are transferred to print data buffer Address XX00h by data bus 5 They are subject to parallel serial conversion inside the gate array and are transferred to Head in...

Page 13: ...hen paper feed has been completed perform pre pulse supply for the 2nd dot line 9 While in pre pulse supply transfer print data one more time to Head for main pulse 10 While in main pulse supply transfer print data to the next dot line 11 On termination of main pulse supply and also when paper feed has been completed perform pre pulse supply for the next dot line 12 When print data continue repeat...

Page 14: ...CPU etc connected to RESO pin No 95 pin checking is performed on every ROM access time thus protecting Thermal Head For other output pins those with pull up are made High while those without are made high impedance Refer to the above mentioned Terminals and Their Functions Recommended Reset IC SEIKO Electronic Co Ltd S 804HNM The gate array when Reset pin Pin 94 is held at low level for 1 Ps or mo...

Page 15: ...being used while Vh voltage of Thermal Head is held interrupted by the above Head Voltage Interrupting Circuit Vdd is applied to Thermal Head In measurement voltage is read where Vdd voltage has been divided into Head resistance value and the reference fixed resistance Measurement is conducted by one time on supply of power and the detecting circuit is held in OFF afterwards HRCHK pin and HRCHK bi...

Page 16: ...output When you do not use this function keep STB pin in low Then it can be used as a general purpose 8 bit input port PCI MIN MAX UNIT T1 100 ns T2 100 ns T3 100 ns T4 80 ns T5 80 ns T6 80 ns BUSY output is available in timings other than those listed above With data written in PCO7 bit 7 of XX04h address port BUSY output is available For other outputs use other ports 4 13 ADDRESS LATCH CIRCUIT T...

Page 17: ...double character conversion circuit perform data processing in 1 byte unit while the 90 turning circuit performs it in 8 bytes unit The methods are shown as follows a 180 Turning Circuit 1 Write into the XX05h processing bit data buffer the bit data for which turning is to be performed 2 With data being read out from output of 180 turned XX05h address data which have been turned by 180 are obtaine...

Page 18: ...1 D51 D61 D71 D00 D10 D20 D30 D40 D50 D60 D70 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh D07 D17 D27 D37 D47 D57 D67 D77 08h D06 D16 D26 D36 D46 D56 D66 D76 09h D05 D15 D25 D35 D45 D55 D65 D75 0Ah D04 D14 D24 D34 D44 D54 D64 D74 0Bh D03 D13 D23 D33 D43 D53 D63 D73 0Ch D02 D12 D22 D32 D42 D52 D62 D72 0Dh D01 D11 D23 D31 D41 D51 D61 D71 0Eh D00 D10 D22 D30 D40 D50 D60 D70 0Fh When writing starts with 08h towar...

Page 19: ...lowing table SIGNAL NAME PIN NO FUNCTION RES 94 Connects system reset When being set to low level this is reset RESO 95 Connects watchdog timer output When being set to low level this is reset When in high level reset is canceled with rising of CS0 CS0 96 Connects Chip Select signal of the watchdog timer To output from CPU connect Chip Select signal of System ROM CS1 97 Chip Select When set to low...

Page 20: ...20 5 OPERATION TIMING Operation timings immediately following initialization are shown below ...

Page 21: ...21 6 PACKAGE SPECIFICATION 6 1 SHAPE AND DIMENSIONS OUTLINE DRAWING Material Main body epoxy type resin satin finish for marking face Lead iron nickel alloy solder plating ...

Page 22: ...22 6 2 MOUNT PAD DIMENSIONS UNIT mm NO OF PINS PER SIDE PIN PITCH PAD WIDTH PAD LENGTH FITTING WIDTH E D e b2 12 Mie Mid 20 30 0 65 0 35 1 9 14 6 20 6 ...

Page 23: ...23 7 REFERENTIAL CIRCUIT DIAGRAM ...

Page 24: ...24 ...

Page 25: ...2Wt or less x VPS Reflow System Recommended Conditions Peak temperature 215ºC and less boiling temp of solvent Time 25㨪40 seconds at 200ºC or above No of times 1 Flux Rosin type flux with less chlorine content chlorine 0 2Wt or less x Wave Soldering System Recommended Conditions Temperature 260 ºC fused solder temp Time within 10 seconds Preheating temperature 120ºC or less package surface temp No...

Page 26: ...e broken 2 Store this before opening at 30ºC with humidity of 60 or below and try to use this in as short a period as possible 3 After opening a bag use this quickly If you like to store this even temporarily after opening be sure to put desiccant fold the opening and seal it with tape etc 8 3 OTHERS 1 Pay attention so that no mechanical stress is applied to lead terminals etc of the package It ma...

Page 27: ...27 9 PACKING SPECIFICATIONS Unit mm Heat resistant conductive plastic Applicable Package No Per Packing 100 pin plastic QFP 60 ...

Page 28: ...on Top or side face of box Label content Product name amount lot No stanards category ITEM PACKAGING CONTAINER ITEM PACKAGING BOX APPLICABLE PACKAGE NAME OF TRAY MAX NO TRAY DIMENSIONS mm WuHuL MAX NO BOX LA 244A heat resistant lead holder u 60 205 u 60 u 360 u 300 ...

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