CDB89712
DS502UM2
4-9
4.5.2
GPIO Assignments
4.5.3
Interrupt Assignments
For information about internal interrupts, see the
CS89712 Data Sheet
.
Port
Reset State
I/O
Description
PA[7:0] Input
I
Keyboard Row Data JP20
PB0
Input
I/O Available for general use on JP19
PB1
Input
O
RTS control line for UART0
PB2
Input
O
Ring Indicate line for UART0
PB3
Input
O
Available for general use.
PB4
Input
O
Available for general use.
PB5
Input
O
Available for general use.
PB6
Input
O
Available for general use.
PB7
Input
O
Available for general use.
PD0
Output – low
O
Diagnostic LED control line.
PD1
I/O
O
Available for general use.
PD2
Output – low
O
Available for general use.
PD3
Output – low
O
Available for general use.
PD4
Output – low
O
Available for general use.
PD5
Output – low
O
Available for general use.
PD6
I/O
O
SDQM0
PD7
Output – low
I/O SDQM1
PE0
Input
O
CS89712 boot-mode selection.
PE1
Input
O
Available for general use.
CS89712 boot-mode selection.
PE2
Input
O
Table 4-7. GPIO Assignments for the CS89712 Development Board
CS89712 Pin
Signal
Description
nEXTFIQ
-EXTFIQ
Available
nEINT1
-EINT1
Available
nEINT2
-EINT2
Available
EINT3
EINT3
Ethernet Interrupt Request
Table 4-8. Interrupt Assignments for the CS89712 Development Board
Summary of Contents for ARM CDB89712
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