JKXT6966 / JXTS6966 Technical Reference
I/O Expansion Boards
5-7
CHASSIS PLANS
PEX10 Overview
The PEX10 is an optional PCIe link expansion board that takes advantage of the additional PCI Express 2.0
interfaces supported on the Intel
®
Xeon
®
EC5500/LC5500-series (i.e. Jasper Forest) processors.
Direct PCI Express 2.0 interfaces from the Jasper Forest processors are a compelling feature of Chassis
Plans’ JXT6966 and JXTS6966 system host boards. The JXT6966 is a dual-processor SHB with more
available PCIe links than the 20 PCIe links currently defined in the PICMG
®
1.3 SHB Express
®
industry
specification. Many system designs could utilize the additional 16 PCIe links offered by second processor
on a Chassis Plans JXT6966 SHB to increase a systems data bandwidth and information throughput. The
PEX10 is an optional PCI Express expansion board that makes these addition 16 links available to the
system designer.
The PEX10 is a passive board that mounts to the back of a Chassis Plans JXT6966. This PEX10 passive
interface card routes the four additional PCIe 2.0 x4 electrical links from second processor on a JXT6966
down to a mechanical x16 PCIe link expansion slot on the backplane. The Chassis Plans BPC7009 and
BPC7041 backplanes support this additional PCI Express 2.0 link expansion slot. The multiple x4 PCIe
links are connected directly to option card slots on the passive BPC7041 backplane. PCIe Gen 2 link re-
drivers are used on the BPC7041backplane to ensure signal integrity between the SHB and the option card.
The x4 links on a BPC7009 backplane are routed to PCIe switching devices to ensure signal integrity and
to combine the x4 links into x8 electrical links for use on selected option card slots and other backplane
devices.
NOTE:
Currently, the PEX10 is compatible with only the Chassis Plans JXT6966 SHB and the Chassis
Plans BPC7009 and BPC7041 backplanes. Chassis Plans is constantly expanding its PCI Express
backplane product offerings. See the Chassis Plans website or contact us for additional backplane
availability.