Chassis Plans ATXN-5520, Technical Reference

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System Bios ATXN-5520 / ATXW-5520 Technical Reference
Chassis Plans 4-10
 Throttling – Closed Loop
 Hyster Temp
 Disabled/1.5° C/3.0° C/ 6.0° C
 Guardband Temp
 Inlet Temp
 Temp Rise
 Airflow
 Altitude
 Sea Level or Below/1-300/301-600/601-900/901-1200/1201-
1500/1501-1800/1801-2100/2101-2400/2401-2700/2701-3000
 DIMM Pitch
 Throttling – Open Loop
 North Bridge Chipset Configuration
 Crystal Beach / DMA
 Crystal Beach / DCA
 Coarse-Grained Clock Gating
 South Bridge Configuration
 USB Functions
 Disabled/2 USB Ports/4 USB Ports/6 USB Ports/8 USB Ports/10 USB
Ports/12 USB Ports
 USB Port Configure
 6x6 USB Ports/8x4 USB Ports
 USB 2.0 Controller
 HDA Controller
 SMBUS Controller
 SLP_S4# Min Assertion Width (4 to 5/3 to 4/2 to 3/1 to 2 seconds)
 Restore on AC Power Loss
 Power Off/Power On/Last State
 SMA Master Break Event
 PCI Express Ports Configuration
 PCIe Port 0
 Auto/Enabled/Disabled
 PCIe Port 1
 PCIe Port 2
 PCIe Port 3
 PCIe Port 4
 PCIe Port 5
 PCIe High Priority Port
 Disabled/Port 0/Port 1/Port 2/Port 3/Port 4/Port 5
 PCIe Port 0 IOxAPIC Enable

Disabled/Enabled
 PCIe Port 1 IOxAPIC Enable
 PCIe Port 2 IOxAPIC Enable