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 User manual for APPEB1012 Revision 1.2, Oct 2019 

Solar Energy Harvesting Supercapacitor Evaluation Board using a 
PMIC with MPPT 

© CAP-XX Pty Limited 2019  |  Tel +61 2 9420 0690  |  www.cap-xx.com 

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high  or  low  for  the  configuration  pins  are  shown  in  figure  6.  Refer  to  the  datasheet  of  the 
AEM10941 if more detail is required.  

 

Figure 6: Configuration headers set all high (left) and all low (right) and configuration resistors 

LDO output configurations 

Two LDOs are available to supply loads at different operating voltages and can be enabled via the 
jumpers on the evaluation board – ENLV and ENHV: 

 

Table 1: Enabling LDO configurations 

The  LDO  outputs,  one  high  and  one  low  voltage,  are  accessible  from  the  LVOUT  and  HVOUT 
headers with voltages Vlv and Vhv respectively, to supply circuits that require a stable voltage. If 
enabled,  LVOUT  and  HVOUT  are  enabled  when  the  supercapacitor  voltage 

  Vchrdy  and  are 

disabled approximately 400ms after the supercapacitor voltage drops below Vovdis.  

MPPT Configuration 

 

Table 2: Usage of MPP[1:0] 

 
Two  configuration  headers,  MPP[1:0]  allow  selection  the  MPP  tracking  ratio  based  on  the 
characteristic  of  the  input  energy  harvesting  source.  The  AEM10941  measures  the  open  circuit 
voltage of the energy harvester and sets the peak power point voltage to be the % of Voc set in 
Table 2. 

ENLV

ENHV

LV output

HV output

1

1

Enabled

Enabled

1

0

Enabled

Disabled

0

1

Disabled

Enabled

0

0

Disabled

Disabled

MPP   [1:0]

V

mpp 

/ V

oc

0

0

70%

0

1

75%

1

0

85%

1

1

90%

Summary of Contents for APPEB1012

Page 1: ...uation Board using a PMIC with MPPT CAP XX Pty Limited 2019 Tel 61 2 9420 0690 www cap xx com Page 1 of 11 Evaluation board user manual APPEB1012 User Manual for APPEB1012 Solar Energy Harvesting Supe...

Page 2: ...with Open circuit voltage sensing for MPPT every 5s Configurable MPPT with 2 pin programming Selectable Vppt Voc ratio of 70 75 85 90 Vin operation from 50mV to 4 5V Configurable cell voltage control...

Page 3: ...xternal resistors that can be used to set these voltages to other values The output of the board can be either directly connected to a load or controlled by the PMIC The PMIC enables the output when t...

Page 4: ...supercapacitor DIR or controlled by the PMIC CTRL When the direct output is chosen on JP3 output control PFETs M3 M5 are bypassed and M3 M4 and M5 are OFF only drawing 200nA leakage current When the...

Page 5: ...CAP XX prismatic dual cells are installed in the same direction Please ensure that the active balance configuration header is connected to the cell midpoint as shown in red in figure 3 below Figure 3...

Page 6: ...eader must be connected to GND as shown in red on the left of figure 5 When 2 CAP XX cylindrical supercapacitors are connected as dual cells both supercapacitors should be fitted with their correct po...

Page 7: ...e LDO outputs one high and one low voltage are accessible from the LVOUT and HVOUT headers with voltages Vlv and Vhv respectively to supply circuits that require a stable voltage If enabled LVOUT and...

Page 8: ...rs that set custom mode All six configuration resistors shown in Figures 6 and 7 must be installed as follows Vovch Vchrdy and Vovdis are defined by R2 R3 R5 and R6 If we define the total resistor RT...

Page 9: ...reshold voltages to be different from the PMIC inbuilt options Table 4 Example resistor values for typical use Output mode selection APPEB1012 has two output modes either directly connect the output t...

Page 10: ...e 3 Custom external resistors were chosen to create the charge management equal to the first row of table 4 In this example Vovch 2 7 Vchrdy 2 57V Vovdis 2 2V and a constant current of 100mA was drawn...

Page 11: ...1 changes from low to high to warn that the system will soon shut down and 600ms later when shutdown occurs STATUS 1 and STATUS 0 both go from high to low This is illustrated in figure 10 Figure 10 Ex...

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