Coarse Gain
Sets the device’s coarse gain.
Fine Gain
Sets the device’s Fine Gain multiplier.
S-fine Gain
Sets the device’s Super-Fine Gain multiplier.
The combination of Coarse and Fine Gain sets the overall system gain to match the re-
quirements of the detector and energy application; overall gain is continuously vari-
able from x2.0 to x1536. The Fine Gain factor is dependent on the Super Fine Gain
(SFG) value. With the SFG set to 0.0000e-2, the Fine Gain covers a range of x0.4 to
x1.6. The SFG value adds to the Fine Gain factor and covers a range of 0.0 to 0.03.
The overall system gain is defined as:
Overall gain = coarse gain * (fine gain + super fine gain)
Pole Zero
Sets the devices’ pole zero setting (0 to 4095). The values 1 to 4095 represent 1.7 ms
to 40 s; a value of zero sets the pole/zero compensation off (infinity).
Coincidence Mode
Sets the devices gating mode (ANTIcoincidence or COINCidence). In COINCidence
mode, a positive GATE pulse enables the conversion of the event in process (in ANTI-
coincidence mode, a positive GATE pulse disables the conversion of the event in pro-
cess). To enable/disable an event, the GATE pulse must occur during the trapezoid
rise time and flat top. The Trapezoid signal timing may be viewed on the MONITOR
Output. The GATE pulse duration must be equal or greater than 50 nanoseconds.
Offset
Sets the devices digital offset in channels. The digital offset shifts the memory assign-
ment of the device’s conversions to the left (e.g. an offset value of 4096 would shift
channel 4096 down to correspond to channel zero of the memory).
LLD
Sets the devices Lower Level Discriminator (LLD) as a percentage of the ADC’s full
scale.
Zero
Sets the devices’ zero intercept as a percentage of the device’s full scale.
Chapter 4 - Genie VMS User Interface and Controls
22
Model 9660-9660A ICB Digital Signal Processor
