CAEN
Electronic Instrumentation
UM5175
–
V2495/VX2495 User Manual rev. 1
55
11.6
DAC Demo Description
Introduction
In this demo, the use of a A395E mezzanine card to configure a DCC output value on its 8 output channels will be
explained. The DAC registers are 16 bits wide, and the dynamic range of the output voltage is +/- 5 V (refer to
for detailed specifications).
Register Map
In this example, 4 registers are used, 2 of which (MONITOR registers) can only be read and 2 (CONTROL registers) can
be both read and written. All registers are 32 bit wide and can be accessed in single access mode.
ADDRESS
REGISTER/CONTENT
ACCESS MODE
Read/Write
Base + 0x1000
Base + 0x1004
Base + 0x1800
Base + 0x1804
Firmware Version
Mezzanine ID number
Control register
DAC register
A24/A32
A24/A32
A24/A32
A24/A32
D16/D32
D16/D32
D16/D32
D16/D32
R
R
R/W
R/W
Register Description
➢
FIRMWARE VERSION register:
Stores the revision number of the firmware.
Address:
0x1000.
Mode:
Read only.
Bit
Description
[31:0]
Revision Number
➢
MEZZANINE ID NUMBER register:
Contains the Mezzanine ID values (see
).
Address:
0x1004.
Mode:
Read only.
Bit
Description
[31:12]
reserved
[11:8]
Mezzanine ID, port F
[7:4]
Mezzanine ID, port E
[3:0]
Mezzanine ID, port D
➢
CONTROL register
Address:
0x1800.
Mode:
Read and Write.
Bit
Description
[31:29]
reserved
[28]
Activation of test mode (sawtooth signal on all channels)
[27:25]
Reserved
[24]
1 = the DAC value is written for the specified mezzanine and channel
0 = the DAC value is read for the specified mezzanine and channel (the result is put in
0x1804)
[23:22]
reserved
[21:20]
Selects the mezzanine for either a write or read access
“00”
= F
“01”
= E
“10”
= D
[19:16]
The 3 LSBs [18:16] select the channel for either a write or read access. If a write access is
performed and [19] = 1 all channels are selected for writing; if a read access is performed
[19] is ignored
[15:0]
DAC value
