Cactus Technologies, Limited
Parameter
Symbol
MIN
MAX
Unit
s
Operating Current
Sleep Mode
Active
I
CC
210
480
mA
3.2.3.
AC Characteristics
Cactus Technologies
®
CFast products conforms to all AC timing requirements as specified in
the CFA specifications. Please refer to that document for details of AC timing for all
operation modes of the device.
4.ATA Drive Register Set Definition and
Protocol
The communication to or from the CFast card is done using FIS. Legacy ATA protocol is
supported by using the legacy mode defined in the SATA specifications. In this mode, the
FIS has defined fields which provide all the necessary ATA task file registers for control and
status information. The Serial ATA interface does not support Primary/Secondary or
Master/Slave configurations. Each SATA channel supports only one SATA device, with the
register selection as defined by the ATA standard.
4.1. ATA Task File Definitions
The following sections describes the usage of the ATA task file registers. Note that the
Alternate Status Register of legacy ATA is not defined for SATA drives.
4.1.1.
Data Register
The Data Register is a 16-bit register, and it is used to transfer data blocks between the SSD
data buffer and the Host.
4.1.2.
Error Register
This register contains additional information about the source of an error when an error is
indicated in bit 0 of the Status register. The bits are defined as follows:
D7
D6
D5
D4
D3
D2
D1
D0
BBK
UNC
0
IDNF
0
ABRT
0
AMNF
Bit 7 (BBK)
This bit is set when a Bad Block is detected.
Bit 6 (UNC)
This bit is set when an Uncorrectable Error is encountered.
Cactus Technologies Limited
Industrial Grade CFast Card Product Manual
v1.1
13
