ProDAQ 3424 Function Card User Manual
3424-XX-UM
Copyright,
1998-2005 Bustec Production Ltd.
Page 17 of 56
STEP
STATE
DESCRIPTION
1
IDLE
(IDLE_ST)
All needed settings (front-end configuration, clock and trigger
selection, Data Acquisition modes) must be done in this step
2
DDS UPDATE
(DDSUD_ST)
Card is brought to this state with the ARMING command if
SYNC_NEED bit has been asserted. In this state, the card
performs the update of the DDS settings. If the board is a Master
then it updates DDS automatically. In the case of a Slave, it waits
for the update pulse generated by the Master and distributed
over SYNC/TRIG line.
This state is skipped if the Arming command is launched with the
SYNC_NEED bit cleared.
3
ADC SYNC
(ADCSYNC_ST)
After DDS UPDATE is done, the card performs reset and thus
synchronization of the ADCs. Similarly to the DDS update, the
Master synchronizes the ADCs automatically while the Slave
waits for the synchronization pulse from the Master. The ADCs
reset and FIR filters settling takes approximately 900ms. At the
end of the process, the Slave gets from the Master another
pulse, which causes them to proceed to next state.
This state is skipped if the Arming command is launched with the
SYNC_NEED bit cleared.
4
READY FOR DA
(READY4DA_ST)
After synchronisation is done, the hardware is ready to start Data
Acquisition. It can either start immediately, or wait for the trigger.
In addition, the card can be configured to acquire the pre-trigger
before the post-trigger phase.
When no pre-
trigger and ‘start on trigger’ is selected, the state
machine stays in READY4DA_ST state as long as the trigger is
not asserted.
5
PRE-TRIGGER
(PRET_ST)
If the pre-trigger has been enabled, the card starts to collect pre-
trigger data. The amount of the scans to collect is defined in the
PRET_NOS register. The number of the pre-trigger samples
must not exceed the FIFO size.
6
POST-TRIGGER
(POSTT_ST)
Post-trigger samples are stored in the FIFO as long as the end of
the Data Acquisition does not happen. The Data Acquisition can
be ended either after a set number of the scans is collected or
after stop trigger event. In this state, it is possible emptying FIFO
on-the-fly for acquisitions longer than the FIFO size.
Table 1
– States of the Data Acquisition state machine
3.3.1. Data Acquisition modes
Data Acquisition is a process of storing samples from ADCs in the FIFO. When the ADCs and
filters have settled (synchronization is done), the board is ready to start Data Acquisition. Data
Acquisition is composed of the pre-trigger and post-trigger. It can be configured to skip the pre-
trigger.
The pre-trigger, if enabled, starts immediately after synchronization is done. The 3424 card collects
specified number of scans (PRET_NOS register) and stores them in the FIFO. The number of the
pre-trigger samples (number of the scans multiplied by number of the channels enabled for the
Data Acquisition) cannot be bigger than the size of the FIFO, as the readout of the FIFO (emptying
the FIFO) is prohibited in this state. When the required number of the scans is collected, the pre-
trigger is done but the board stays in the pre-trigger state as long as the conditions to start the
post-trigger are not fulfilled. In this case, every new scan added to the FIFO causes the oldest scan
to be dropped.
