Broadcom
ACPL-C740-EvalKit-UG100
2
ACPL-C740 Evaluation Kit Board
User Guide
Isolated Sigma-Delta Modulator
A digital filter converts the single-bit data stream from the modulator into a multi-bit output word similar to the digital output
of a conventional A/D converter. With this conversion, the data rate of the word output is also reduced (decimation). A Sinc3
filter is recommended to work together with the ACPL-C740. With a 20-MHz internal clock frequency, 256 decimation ratio,
and 16-bit word settings, the output data rate is 78 kHz (20 MHz/256). This filter can be implemented in an ASIC, FPGA, or
DSP.
In this evaluation board, a Sinc3 filter is implemented using the Xilinx Spartan XC3S250E FPGA. The FPGA hardware is
designed in a Verilog/VHDL environment. The major building blocks are the Digital Filter and USB interface control, as
shown in
. The design is synthesized and implemented using the Xilinx Tool to a bitstream file. This bitstream file
can be loaded to FPGA through USB, a step already done for each evaluation board kit.
Figure 2: Digital Filter and USB Interface Control
Preparation and Setup
Each complete ACPL-C740 evaluation kit shipment includes the following items:
ACPL-C740 evaluation board
Cable with USB/mini-USB terminations
Softcopy folder containing drivers and application software programs. The softcopy folder contains the following
document or software programs:
– ACPL-C740 Xilinx FPGA Evbd Kit User Guide.pdf: Evaluation board user guide
– CDM21228_Setup.exe: FTDI USB chipset driver for Windows 32-bit and 64-bit operating systems. For other
operating systems, download from the manufacturer's website (http://www.ftdichip.com/Drivers/VCP.htm)
– dig_filter.exe: Broadcom application GUI software
– DigFil_200mvINcmosOUT.bit: FPGA bitfile
– Sinc3_verilog.txt: Sinc3 filter codes in Verilog
– Sinc3_VHDL.txt: Sinc3 filter codes in VHDL
– Sine wave files: Sine waves configured to different frequencies 500 Hz, 1000 Hz, and 2000 Hz that can be played
from any audio player
1. Save the softcopy folder to a PC directory location. See the appendix for descriptions of the major components on the
evaluation board, the schematic diagrams, and PCB layout.
2. Connect the FPGA-EVBD board to the PC using the provided USB cable.
3. Turn on switch SW1. The red
5VIN
LED lights up, indicating the presence of a USB connection.
4. Install the CDM21228_Setup.exe USB chipset driver file. The driver installs two ports: USB Serial Converter A and USB
Serial Converter B.
ACPL-C740
FPGA
Digital
Filter
USB
interface
Chip
USB
interface
control
Clock detection
mclk
mdat
Analog Input
