Broadcast Electronics AM-2.5E, User Manual

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1-64. Reflected Power Emergency. Reflected power emergency conditions are monitored by
comparator U66D. U66D compares a reflected power sample to a fast voltage reference
from U63C. When a reflected power emergency causes the sample to increase above the
reference, the output of U66D will go LOW. The LOW is applied to OR gate U62B. U62B
will output a LOW reflected power emergency attack signal to NAND gate U60D. With a
HIGH lightning detector signal indicating no lightning activity, U60D will output a HIGH
to latch U59A and OR gate U45B. U45B will output a HIGH: 1) to AND gate U47C, 2) to
OR gate U19A, and 3) emergency mute command. With a HIGH enable failure signal,
U47C will output a HIGH fast foldback attack signal to priority encoder U28. U19A will
output a HIGH to: 1) bias driver transistor Q50 on to illuminate PWM mute indicator
DS3 and 2) inverter U54A. U54A will output a LOW to bias driver transistor Q51 off to
mute the PWM signal.
1-65. A LOW reflected power emergency attack signal is also applied to inverter U60C. U60C
will output a HIGH to OR gate U69C. U69C is designed as a latching gate. When a
reflected power emergency attack signal is present, a LOW foldback reset command will
bias transistor Q56 off. This allows the output of U69C to be latched HIGH to maintain
the indicator circuitry when the condition is removed.
1-66. The HIGH from U69C is applied to reflected power emergency latch U49A. The output of
U49A will go HIGH. The HIGH is applied to: 1) OR gate U50B, 2) NOR gate U55,
3) AND gate U51A, and 4) transistor Q29. OR gate U50B will output a HIGH to bias Q39
off to disable the green antenna status indicator. NOR gate U55 will output a LOW which
is inverted at U54F. U54F will output a HIGH to bias Q34 and Q35 on to enable the
alarm indicator. U51A ANDs a 2 Hz signal with the HIGH from U49A to generate a
flashing signal to OR gate U50C. U50C will output the signal through U51 and U50 to
transistor Q38. The output of Q38 will flash to generate a flashing red antenna status
indicator. Transistor Q29 will be biased on to provide a LOW remote reflected power
emergency signal.
1-67. Lightning Conditions. Lightning conditions are monitored by NAND gate U60D. When
lightning is detected at the transmitter output, the lightning detector status input will go
LOW. The LOW is applied to NAND gate U60D and inverter U46B. U60D will output a
HIGH to latch U59A and to OR gate U45B. With a HIGH from U60D, U45B will output a
HIGH: 1) to AND gate U47C, 2) to OR gate U19A, and 3) emergency mute command.
With a HIGH enable failure signal, U47C will output a HIGH fast foldback attack signal
to priority encoder U28. U19A will output a HIGH to: 1) bias driver transistor Q50 on to
illuminate PWM mute indicator DS3 and 2) inverter U54A. U54A will output a LOW to
bias driver transistor Q51 off to mute the PWM signal.
1-68. Inverter U46B will respond by routing a HIGH to latch U49C. The output of U49C will
go HIGH. The HIGH is applied to NOR gate U55 and to transistors Q33 and Q37. The
HIGH will bias Q33 and Q37 on to illuminate the lightning status indicators. NOR gate
U55 will output a LOW which is inverted at U54F. U54F will output a HIGH to bias Q34
and Q35 on to enable the alarm indicator.
1-69. Foldback Indication. Two circuit functions are monitored to indicate when the
transmitter is in a foldback condition: 1) when the Q2 output of U28 is HIGH and
2) when the carryout signal of U31 is HIGH. When priority encoder U28 outputs a binary
number in response to an attack signal, the Q2 output of U28 will be HIGH. The HIGH is
applied to latch U67D. The Q output of U67D will go HIGH. The HIGH is inverted at
U25C and applied to NAND gate U16C.