Broadcast Electronics AM-2.5E, User Manual

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1-45. Power Control Driver Circuit. The power control driver circuit consists of: 1) operational
amplifiers U40B and U44A, 2) switch U41A, and 3) AND gate U36C. The power level
reference voltage from U42 is applied to integrated circuit U40B. U40B is configured as
an inverting amplifier. The output of U40B is applied to comparator U44A and switch
U41A. U41A is controlled by the sample from the output of U44A. U41A is a feedback
control network designed to convert the reference voltage from U40B to a voltage
proportional to power. U44A compares the power level reference to a ramp signal
generated by integrated circuit U40C. U44A produces a square-wave PWM
(pulse-width-modulated) signal which varies in response to the power level. The signal
is ANDed at U36C with the operate signal from U22B. With a HIGH operate signal from
U22B, the PWM signal is routed through carrier control driver Q22 to the power supply
circuit board.
1-46.
POWER CONTROL TRIM CIRCUIT.
The transmitter RF output power level can be
trimmed to a desired level by the raise/lower switch/indicators. When a raise or lower
switch/indicator is depressed, a HIGH is applied to the raise/lower power adjust circuit.
The circuit consists of: 1) logic gates U24B, U31D, U16B, U23C, and U19C, 2) up/down
counters U34 and U35, and 3) digital-to-analog converter U43. The circuit is designed to
increase or decrease RF output power by increasing/decreasing the reference voltage.
1-47. Logic gates U24B, U31D, U16B, U23C, and U19C control up/down counters U34 and U35.
NOR gate U24B and OR gate U31D monitor raise, lower, and foldback signals. NOR gate
U24B is designed to configure counters U34/U35 to count up or down. U24B will output a
HIGH to configure U34/U35 to count up. U24B will output a LOW to configure U34/U35
to count down. For example, when the raise switch/indicator is depressed, a HIGH is
applied to U34/U35. The HIGH configures U34/U35 to count up. U34/U35 will output
binary numbers to digital-to-analog converter U43. U43 decodes the numbers from
U34/U35 and increases the power control reference voltage generated from power control
D-to-A converter U42. U42 outputs the increased reference voltage to the power control
driver circuit to increase the RF output power.
1-48. Logic gates U16B, U23C, and U19C control the loading of counters U34/U35. The logic
gates monitor: 1) high reflected power conditions, 2) reset conditions, and 3) trim reset
operations. Trim reset is when the power control trim is reset to mid-range when a
power level switch/indicator is depressed. If a trim reset condition, a reset condition, or a
high reflected power condition occurs, U19C will output a HIGH to counters U34/U35.
The HIGH resets counters U34/U35 to mid-range.
1-49. Trim Reset. Trim reset is a function which resets the power control trim function to
mid-range when a power level switch/indicator is depressed. When a power level switch
is depressed, a HIGH trim reset command from U14 is applied through jumper P12 to OR
gate U19C. U19C will output a HIGH to up/down counters U34/U35. The HIGH
configures U34/U35 to mid-range. With U34/U35 at mid-range, the power trim circuit
can be raised or lowered an equal amount. Jumper P12 allows the trim reset function to
be disabled if required.
1-50.
TRANSMITTER OFF.
RF output power is immediately terminated when the ECU off
switch is depressed. When the off switch/indicator is depressed, a HIGH is applied to OR
gate U13A. U13A will output a HIGH to priority encoder U14. U14 will output a binary
number through latches U15/U17 to BCD-to-decimal decoder U18 and to multiplexer
U39. U18 will output a HIGH to NOR gate U23A. U23A will output a HIGH to bias
power contactor driver Q13 off to disable the fans and the power supplies. U39 will
respond by terminating the power control reference voltage to terminate the power
control PWM signal