1-31
1-146.
BAND-PASS FILTER.
The output of amplifier U37 is applied to a forth order linear phase
band-pass filter. The band-pass filter consists of: 1) inductors L4, L5, L6, and L7,
2) capacitors C110 and C115, and 3) programming switches S2, S3, and S4. The filter
provides proper amplitude limiting during high single channel conditions. Programming
switches S2, S3, and S4 select resistor and capacitor combinations to program the filter
for specific groups of frequencies within the AM broadcast band. Inductors L4, L5, L6,
and L7 tune the filter for proper operation. The output of the filter is applied to a
transistor amplifier array.
1-147.
TRANSISTOR AMPLIFIER CIRCUIT.
The output of the band-pass filter is applied to a
transistor array consisting of transistors Q1, Q2, U38B, U38C, U38D, and U38E. The
signal is amplified to a 2 volt peak-to-peak level by transistors U38B, U38C, U38D, and
U38E. The transistors also perform unbalanced-to-balanced signal conversion. The
balanced signal from transistors U38B, U38C, U38D, and U38E are buffered by
transistors Q1 and Q2 for application to the amplitude limiter circuit.
1-148.
AMPLITUDE LIMITER CIRCUIT.
The balanced quadrature signal from the transistor
amplifier circuit is applied to an amplitude limiter circuit. The amplitude limiter circuit
consists of integrated circuits U39A, U39B, and U39C. The circuit produces phase
modulation containing the L-R information. The output of the limiter is applied to an
output network.
1-149.
OUTPUT NETWORK.
The 1 volt peak-to-peak phase modulated signal from the amplitude
limiter circuit is applied to transformer T1. T1 is provided to increase the
voltage to a 5 volt peak-to-peak level. The output of T1 is buffered by inverters U40A
and U40B. Potentiometer R193 adjusts the symmetry of the signal to null the second
harmonic frequency. The output of U40B is routed for application to the exciter circuit
board.
1-150.
OPERATING MODE SELECTION AND INDICATION CIRCUIT.
The stereo circuit board
can be configured for stereo, mono left, mono right, or mono L+R operation. The circuit
board is configured for the desired mode of operation by a mode selection and indication
circuit. HIGH remote mono left, mono right, mono L+R, and stereo commands are
applied to optical couplers U45 through U48. The outputs of U45 through U48 are
applied to OR gates U49A through U49D.
1-151.
Local control operations are directed by mode select switch S5. S5 controls a mode
counter circuit consisting of integrated circuits U53, U54A, U54B, U54C, and U54D. The
switch operates by advancing the counter each time the switch is depressed. This results
in the circuit advancing through the modes of operation in the following order: 1) stereo,
2) mono left, 3) mono right, or 4) mono L+R. The mode counter circuit selects a mode by
routing a HIGH control command to the OR gates U49A through U49D.
1-152.
OR gates U49A through U49D select a command from the remote control optical couplers
or the local mode counter circuit. For example, the circuit board is desired to be
configured for stereo operation. A HIGH from remote stereo optical coupler U48 or the
local mode control circuit is applied to OR gate U49D. U49D outputs a HIGH through OR
gate U52A to priority encoder U50. U50 monitors the OR gates for additional commands
and determines the highest priority mode of operation. Once the mode of operation is
determined, U50 will output a two bit binary code to a mono/stereo decoder circuit.