1-25
1-118.
LOCK DETECTOR CIRCUIT.
The frequency synthesizer circuit is monitored for proper
operation by a lock detector circuit. Integrated circuits U28A, U28B, and U36A function
as a lock detector circuit. The circuit monitors an output sample signal and a divided
VCO sample signal from U25. If the VCO and the reference phases are within
±
180
degrees, the VCO is locked to the correct frequency. If the phases are out of tolerance, the
output of U36A will go LOW. The LOW is applied to comparator U27. The output of U27
will go HIGH to extinguish lock indicator DS4 and is inverted at U33A. U33A will output
a LOW to U30B which mutes the output of the frequency synthesizer.
1-119.
A sample from the lock detector circuit is applied to divide-by-3600 circuit. The circuit
consists of integrated circuits U34, U35A, U35B, U35C, and U36B. The divider circuit is
designed to generate a 25 Hz pilot signal for application to the stereo circuit board.
1-120.
STEREO DETECTION CIRCUIT.
The presence of a stereo signal is detected by a stereo
detection circuit. This circuit allows the transmitter to be: 1) converted to monophonic
operation by removing the stereo circuit board or 2) converted to stereophonic operation
by inserting the stereo circuit board. The circuit will also detect the presence of an
external stereo signal.
1-121.
Stereo signals from the stereo circuit board are applied to programmable jumper P7. P7
selects a stereo signal from the internal stereo circuit board or from an external source.
The external source is applied to a processing circuit consisting of integrated circuit U32C
and the associated circuitry. The processing circuit provides ac coupling, over-voltage
limiting, and square-wave generation.
1-122.
Either an external or internal stereo signal from P7 is applied to an RF detector circuit.
The RF detector consists of: 1) resistors R151 through R155, 2) capacitors C124 and C125,
and 3) diode D27. The detector rectifies the signal for application to an automatic
mono/stereo select circuit consisting of integrated circuits U32A, U30B, U32C, and U32D.
1-123.
The mono/stereo select circuit will route a stereo or mono signal to an RF drive circuit in
response to the presence of stereo. If a stereo signal is present, the output of U32A will be
LOW. The LOW will disable mono on gate U30C and enable stereo on gate U32B. The
stereo signal from U32B will be applied through NAND gate U32D to a phase modulator
circuit. If a stereo signal is not present, the output of U32A will be HIGH. The HIGH
will enable U30C and disable U32B to allow the monophonic RF signal to be applied to the
phase modulator circuit.
1-124.
IPM WAVE SHAPE CIRCUIT.
The IPM adjust and IPM power reference signals from the
IPM correction circuit are applied to an IPM wave shape circuit. The signals are
amplified at U41A. The output of U41A is applied to an IPM wave shape circuit
consisting of integrated circuit U41B and diodes D30 and D31. The circuit is designed to
output a phase modulated signal which is equal in amplitude and out-of-phase with the
phase modulation component in the RF amplifier section. Potentiometer R198 controls
the shape of the IPM correction signal. Potentiometer R189 controls the amplitude of the
IPM correction signal. Diodes D32 through D37 provide over-voltage protection. The
output of the IPM wave shape circuit is applied to the phase modulator circuit.
1-125.
PHASE MODULATOR CIRCUIT.
A phase modulator circuit is incorporated into the
exciter circuitry to cancel incidental-phase-modulation (IPM) in the RF amplifier section
of the transmitter. The circuit is designed to insert a phase modulation component which
is equal in amplitude and out of phase with the phase modulation in the RF amplifier
section. This feedforward approach is designed to effectively cancel (IPM) in the
transmitter.