BOSER Technology HS-6238, Manual

Page: 41 / 95

35
4.6 Advanced Chipset Setup
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that the
data has been lost while using your system.
AMIBIOS SETUP – ADVANCED CHIPSET SETUP
(C)2001 American Megatrends, Inc. All Rights Reserved
CPU Ratio Selection Safe Mode Available Options:
CPU BIST Enable Disabled ` Safe Mode
ICH Delayed Transaction Disabled 3.0x
DMA Collection Buffer Enable Disabled 3.5x
DRAM Page Closing Policy Open 4.0x
Memory Hole Disabled 4.5x
Auto detect PCI Clock Disabled 5.0x
ClkGen Spread Spectrum Enabled 5.5x
System memory Frequency 133MHz 6.0x
SDRAM Timing by SPD Enabled 6.5x
DRAM Refresh 7.8us 7.0x
DRAM Cycle time (SCLKs) 5/7 7.5x
CAS# Latency (SCLKs) 2 8.0x
RAS to CAS delay (SCLKs) 3
SDRAM RAS# Precharge (SCLKs) 3
Internal Graphics Mode Select 1MB
Display Cache Window Size 64MB
AGP Aperture Window 64MB
Local memory Frequency 100MHz
Initialize Display Cache Memory Enabled
Paging Mode Control Close
RAS – to CAS Default
RAS Latency Slow
RAS Timing Slow
RAS Precharge Timing Slow
CPU Latency Timer Disabled
USB Function All USB Port ESC:Exit :Sel
USB Device Legacy Support Disabled PgUp/PgDn: Modify
Port 64/60 Emulation Disabled F1:Help F2/F3:Color
ICH Delayed Transaction:
This function allows you to enable or disable PCI 2.1 features
including passive release and delayed transaction.