VITA-49 Radio Transport Protocol
BNC RTSA7500 Real Time Spectrum Analyzer Programmer's Guide
12
RTSA7500 Functional Overview
This section overviews the RTSA7500's functionality and protocols used, and
summarizes the SCPI command sets for controlling the individual functions.
Note: This is a living and evolving document. We welcome your feedback.
The features and functionality described in this section
may
exist in the current product
firmware release or are scheduled for a future product firmware release (grayed out
commands and/or text). Please refer to
Appendix F: SCPI Commands Quick Reference
for the complete list of
commands and the availability information. No hardware upgrade
is required at each feature release (unless specified though unlikely).
System Overview
The Model 7500 Real Time Spectrum Analyzer is a high-performance software-defined
RF receiver, digitizer and analyzer, as illustrated in
Figure 1
. With patent-pending
software-defined RF receiver technology, the RSTA 7500 provides industry leading
combined sensitivity, tuning range, instantaneous bandwidth (IBW) and scan rate.
Additionally, it provides real-time sophisticated triggering and capture control.
The Model 7500 is designed for stand-alone, remote and/or distributed wireless signal
analysis. It is ideal for monitoring, management and surveillance of transmitters, whether
they are in-building or spread across a geographic area. Applications include, but are not
limited to:
spectrum analysis, wireless network management and interference mitigation;
cognitive radio and white space spectrum sensing, enterprise wireless signal
intrusion detection (WSID);
government spectrum licensing monitoring and enforcement;
technical security counter measures (TSCM) and military communications and
signals intelligence (COMINT/SIGINT and CEW).
The RSTA 7500 hardware largely consists of:
a hybrid super-heterodyne and direct-conversion RF receiver front-end (RFE);
receiver front end inputs and outputs to support clock synchronization, direct
digitization input, and IF output for high-end digitization;
a 125 MSample/sec 12-bit (or 14-bit as a population variant) wideband (WB)
ADC with a dynamic range of about 70dB;
a 300 kSample/sec 24-bit narrowband (NB) ADC with a dynamic range in excess
of 100dB;
a large Xilinx FPGA with embedded MicroBlaze microprocessor, Gigabit Ethernet
interface and custom embedded digital signal processing (DSP) logic;
128 or 256 MB of DDR3 for real-time caching of digitized data; and
a general purpose input/output (GPIO) port.
