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SECTION 3
THEORY OF OPERATION
General
MODULE INTERFACE
Figure 3-1 shows a simplified block diagram of the Module Interface board. The path for communication
between mainframe and module is via P8. The eight QAD lines and five QA lines are the bus interface
lines and a MOD DIS line is used for disabling the Output board. Power is also delivered by P8.
The address demultiplexer and select logic circuitry decodes the bus signal and selects one of the other
blocks.
The I.D. ROM contains information necessary for operation specific to the Output board. This includes
boundaries for parameters, values used to initialize the nonvolatile RAM (NVRAM), and the version
number of the I.D. ROM.
The nonvolatile RAM is used for saving and retrieving ten panel settings. It also holds the GPIB/RS232
bus settings.
The digital control circuits are used to monitor and set the operation state of the Output board. The DACs
and amplifiers provide four analog signals values that can be used for level control. All of the control,
status and analog signals are delivered to the Output board by two 20-pin connectors, J1 and J2.
OUTPUT CIRCUIT
Figure 3-2 shows the block diagram of the 202H Output board. 8-bit data is received by the Interface
board (shown inside dashed lines) and is converted to an analog voltage by a digital to analog converter
(DAC). It is passed on to the Output board as the PEAK LEVEL signal (BASELINE and EXT DRIVE are
not used for the 202H). This voltage ranges from 0V to
–3V corresponding to pulse amplitudes of 0V and
300V. The polarity is determined by a switch in the output stage that is manually set before the plug-in
is inserted into the 6040 mainframe.
The dc control circuit performs several functions:
1. It inverts the 0V to
–3 V DAC voltage and shifts it to a level appropriate for the control voltage (Vc) of
the dc-dc converter.
2. It compares the actual 0 V to
300 V output to the DAC output voltage and, if necessary, corrects the
value of Vc.
3. It monitors the primary current drawn by the dc-dc converter and prevents the Vc signal from causing
too high a demand. The polarity LEDS are caused to blink until the control circuit returns to normal.
4. It detects whenever the programmed level has been changed and generates a signal that gates off the
main control loop until the output has stabilized. This prevents the accumulation of spurious errors inside
the loop.
