Internal connections
CB6464
23
Version: 0.4
Description
Signal
Pin
Signal
Description
PCIe Lane 1
R
PER0#
SATAB
41
42
GPIO1
(not led out)
PCIe Lane 1
Receive -
PER0
SATAB#
43
44
GPIO2
(not led out)
Ground
GND
45
46
GPIO3
(not led out)
PCIe Lane 1
Transmit -
PET0#
SATAA#
47
48
GPIO4
(not led out)
PCIe Lane 1
Tr
PET0
SATAA
49
50
PRST#
PCIe Reset
active low
Ground
GND
51
52
CLKREQ#
PCIe Clock Enable
active low
PCIe Lane 1
Reference Clock -
REFCLK#
53
54
PEWAKE#
Link Reactivation
active low
PCIe Lane 1
Reference Clock -
REFCLK
55
56
N/C
(not led out)
Ground
GND
57
58
N/C
(not led out)
(not led out)
ANTCTL0
59
60
COEX3
(not led out)
(not led out)
ANTCTL1
61
62
COEX2
(not led out)
(not led out)
ANTCTL2
63
64
COEX1
(not led out)
(not led out)
ANTCTL3
65
66
SIM DETECT
(not led out)
Power good
RESET#
67
68
SUSCLK
System clock
Configuration pin
CFG1
69
70
3.3 V
Standby supply
voltage S 3.3 V
Ground
GND
71
72
3.3 V
Standby supply
voltage S 3.3 V
Ground
GND
73
74
3.3 V
Standby supply
voltage S 3.3 V
Configuration pin
CFG2
75
Summary of Contents for CB6464
Page 1: ...Manual for Computerboard CB6464 0 4 25 10 2019 Version Date...
Page 2: ......
Page 6: ...CB6464 6 Version 0 4...
Page 64: ...Mechanical drawings CB6464 64 Version 0 4 10 2 PCB Pin 1 distances Fig 14 MZ Pin1 CB6464_G3...
Page 65: ...Mechanical drawings CB6464 65 Version 0 4 10 3 PCB Dimensions Fig 15 MZ CB6464_G3...
