REF: BBONEBLK_SRM
BeagleBone Black System
Reference Manual
Rev A5.2
Page 54 of 108
6.4.2
eMMC Circuit Design
Figure 32
is the design of the eMMC circuitry. The eMMC device is connected to the
MMC1 port on the processor. MMC0 is still used for the uSD card as is currently done on
the original BeagleBone.
The device runs at 3.3V both internally and the external I/O rails. The VCCI is an
internal voltage rail to the device. The manufacturer recommends that a 1uf capacitor be
attached to this rail, but a 2.2uF was chosen to provide a little margin.
Pullup resistors are used to increase the rise time on the signals to compensate for any
capacitance on the board.
DGND
VDD_3V3B
C125
2.2uF,6.3V
DGND
R
10
1
10
K,
1%
R
10
2
10
K,
1%
R
10
4
10
K,
1%
R
10
3
10
K,
1%
VDD_3V3B
R
10
5
10
K,
1%
R
10
6
10
K,
1%
R
10
7
10
K,
1%
R
10
8
10
K,
1%
R
10
9
10
K,
1%
R
11
0
10
K,
1%
U13
MEM_MNAND_2GB
DAT0
A3
DAT1
A4
DAT2
A5
DAT3
B2
DAT4
B3
DAT5
B4
DAT6
B5
DAT7
B6
VC
C
I
C2
VSSQ4
C4
VC
C
Q4
C6
VC
C
3
E6
VSS2
E7
VSS5
N5
VC
C
2
F5
VSS1
G5
VSS3
H
10
VSS4
K8
VC
C
1
K9
VC
C
Q5
M4
CMD
M5
CLK
M6
VSSQ1
N2
VC
C
Q3
N4
VC
C
Q1
P3
VSSQ3
P4
VC
C
Q2
P5
VSSQ2
P6
RST
K5
VC
C
0
J10
R
11
1
10
K,
1%
U5A
AM3358_ZCZ
MMC1_CLK
U9
MMC1_CMD
V9
MMC1_DAT0
U7
MMC1_DAT1
V7
MMC1_DAT2
R8
MMC1_DAT3
T8
MMC1_DAT4
U8
MMC1_DAT5
V8
MMC1_DAT6
R9
MMC1_DAT7
T9
GPIO2_0
T13
R162
0,1%,DNI
Figure 32.
eMMC Memory Design
The pins used by the eMMC1 in the boot mode are listed below in
Table 6
.
Table 6.
eMMC Boot Pins
For eMMC devices the ROM will only support raw mode. The ROM Code reads out raw
sectors from image or the booting file within the file system and boots from it. In raw
mode the booting image can be located at one of the four consecutive locations in the
main area: offset 0x0 / 0x20000 (128 KB) / 0x40000 (256 KB) / 0x60000 (384 KB). For
this reason, a booting image shall not exceed 128KB in size. However it is possible to
