Basler slA1000-30fm, User Manual, Page: 115 / 166

Standard Features
Basler scout light 107
Shift By 4
When the camera is set to shift by 4, the
output from the camera will include bit 7
through bit 0 from the ADC along with 4
zeros as LSBs.
The result of shifting 4 times is that the
output of the camera is effectively
multiplied by 16.
When the camera is set to shift by 4, the 4
least significant bits output from the
camera for each pixel value will be 0. This means that the gray value scale will only include every
16th gray value, for example, 16, 32, 48, 64, and so on.
If the pixel values being output by the camera’s sensor are high enough to set bit 8, bit 9, bit 10, or
bit 11 to 1, we recommend not using shift by 4. If you do nonetheless, all bits output from the camera
will automatically be set to 1. Therefore, you should only use the shift by 4 setting when your pixel
readings with a 12 bit pixel format selected and with digital shift disabled are all less than 256.
9.3.2 Digital Shift with 8 Bit Pixel Formats
No Shift
As mentioned in the Functional Description section of
this manual, the camera uses a 12 bit ADC to digitize
the output from the imaging sensor. When the camera
is set for a pixel format that outputs pixel data at 8 bit
effective depth, by default, the camera drops the 4
least significant bits from the ADC and transmits the 8
most significant bits (bit 11 through 4).
Shift by 1
When the camera is set to shift by 1, the output from
the camera will include bit 10 through bit 3 from the
ADC.
The result of shifting once is that the output of the
camera is effectively multiplied by 2. For example,
assume that the camera is set for no shift, that it is
viewing a uniform white target, and that under these
conditions the reading for the brightest pixel is 10. If
you changed the digital shift setting to shift by 1, the
reading would increase to 20.
ADC
Shifted Four Times
M
S
B
L
S
B
bit
0
bit
1
bit
2
bit
3
bit
4
bit
5
bit
6
bit
7
bit
8
bit
9
bit
10 bit
11
"0" "0" "0" "0"
ADC
Not Shifted
M
S
B
L
S
B
bit
0
bit
1
bit
2
bit
3
bit
4
bit
5
bit
6
bit
7
bit
8
bit
9
bit
10 bit
11
ADC
Shifted Once
M
S
B
L
S
B
bit
0
bit
1
bit
2
bit
3
bit
4
bit
5
bit
6
bit
7
bit
8
bit
9
bit
10 bit
11