DESCRIPTION AND OPERATION
RIO CIRCUITRY
2 - 4
I-E96-317A
®
Machine Fault Timer (MFT)
The MFT circuit is periodically retriggered by the CPU under
normal conditions. If any of the following conditions are
detected by the CPU, it does not retrigger the MFT:
•
Failure of ROM checksum (an error-detecting procedure).
•
Failure of diagnostics at reset/power up time.
•
Failure of diagnostics in diagnostic mode with HALT ON
ERROR enabled.
When the MFT expires, the CPU is halted and the red/green
LED becomes red.
Serial to CPU Interface
This block contains circuitry for the serial communications
link, along with FIFO (First In, First Out) buffers. The CPU
receives and transmits messages through the FIFO buffers.
The CPU transmits a message and waits for a reply. The CPU
can read the Serial Link Information Buffer for information
about interrupt sources and the current status of the link.
Serial Link Interface
This block contains the driver and receiver circuits for the
serial link interface. The receiver circuits condition and amplify
the input waveform, and a custom integrated circuit converts
this signal back to digital data. This digital data is then stored
in the Receive FIFO buffer.
