DESCRIPTION AND OPERATION
OUTPUT CIRCUIT CONNECTIONS
I-E96-313A
2 - 3
The default control logic block is a one bit latch register. It
sends a signal to the data selector block to select either the
default register data or the output register data during a
time-out
(indicating a master module error). This signal is
dependent on the master module configuration (FC 83 specifi-
cation 2). The bus fault detector in the slave expander bus
interface checks for a
time-out
condition. During a
time-out
, the
data selector block normally selects the default register data. If
a
hold
option is selected in FC 83, the default control logic cir-
cuits send a logic 1 to override the data selector. It causes the
data selector to drive the outputs with the output register data
instead of default data to maintain the outputs at their current
values (
hold
).
Status Logic
The status buffer block provides module status information to
the master module. This information is output states, and
module identification and status. The master module reads
this data through the slave expander bus interface. Refer to
in this section for an explanation of the data.
OUTPUT CIRCUIT CONNECTIONS
The output signals connect to the 30-pin card edge connector
P3 of the DSO using a termination cable from a TU/TM. Proper
polarity wiring of field signals is necessary for the output cir-
cuits to function properly.
SLAVE EXPANDER BUS
The Infi 90 slave expander bus is a high speed synchronous
parallel bus. It provides a communication path between master
modules and slave modules. The master module provides the
control functions and the slave module provides the I/O func-
tions. The P2 card edge connector of the slave and master mod-
ule connect to the bus.
The slave expander bus is twelve parallel signal lines located
on the Module Mounting Unit (MMU) backplane. A 12-position
dipshunt placed in a connection socket on the MMU backplane
connects the bus between the master and slave modules. Cable
assemblies can extend the bus to six MMUs.
A master module and its slaves form an individual subsystem
within a Process Control Unit (PCU). The slave expander bus
between master/slave subsystems must be separated. Leaving
a dipshunt socket empty or not connecting the MMUs with
cables separates them.
