Axon Axopatch 200B, Theory Of Operation

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42 • COMPUTER INTERFACING
Axopatch 200B, Copyright 1997-1999, Axon Instruments, Inc.
several channels of the computer's A/D converters, it is possible to have your software
interrogate the outputs before recording data so as to automatically determine the important
switch settings at the time the data is recorded. This information can be included with the
data record so that analysis programs can read it and, thus, always have the correct
information for analyzing the recording (
e.g. , scaling).
These outputs include telegraphs for settings of the following switches: gain, filter
(frequency), and mode. In addition, an output is available which is proportional to the
whole-cell capacitance setting on the front panel WHOLE CELL CAP. potentiometer. (See
Output BNCs in
REFERENCE SECTION: GENERAL INFORMATION
section for details
of actual voltages and settings.)
For both single-channel and whole-cell experiments, there is a rear panel BLANK
ACTIVATE INPUT. It holds the current at the level that exists at the time a positive
TRANSISTOR TRANSISTOR LOGIC (TTL) pulse is applied to this input. The current is
held at this level as long as the pulse is HI. This feature is particularly useful for blanking
out the capacitance transient associated with the leading edge of a voltage command. One
way to utilize it is by using a second channel of D/A converter or a digital output to activate
this line either just before or simultaneously with the application of a voltage step to the
EXT. COMMAND input. The duration of the blanking input would be that expected for
the duration of the capacitance transient.
Two rear panel BNCs are provided specifically for use in single-channel recording with the
integrating headstage. One is the FORCED RESET INPUT. A disadvantage of integrating
headstages is that they must be reset periodically. The larger the current that flows, the
more often resets occur. Although the reset glitches are small they may be bothersome to
some single-channel detection schemes. In pulsed experiments it is possible to minimize
the occurrence of these glitches by resetting the integrator immediately before applying a
voltage step. For many kinds of channels this ensures that no reset glitches will occur
during the brief recording period following the onset of the command. This is again done
by using a second channel of D/A converter or a digital output to apply a TTL pulse to the
FORCED RESET line just before applying the command step. To ensure that one does not
unknowingly utilize data taken during a reset or an external blanking, a DATA NOT
VALID OUTPUT is supplied to the user. This line produces a TTL HI (positive) during
the time that the output is held via the sample and hold circuit either during reset or
blanking. The user is free to implement some scheme to interrogate this line during data
collection to determine precisely when the data is not valid.