AXIOMTEK SHB103 Series, User Manual

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SHB103 LAG1156 Full-Size SBC User’s Manual
Hardware Description
35
4.4 I/O Port Address Map
The Intel
®
Core™2 Extreme/
Intel
®
Core
™
2 Quad / Core
™
2 Duo/Celeron
®
CPUs can communicate via I/O ports.
There are total 1KB port addresses available for assignment
to other devices via I/O expansion cards.
Address Devices
000-01F DMA controller #1
020-02D, 024-025
028-029, 02C-02D
Interrupt controller #1
02E-02F Forwarded to LPC(LPC Super I/O )
030-031, 034-035
038-039, 03C-03D
Interrupt controller #2
040-043, 050-053 Timer/Counter (8254)
060 Forwarded to LPC (Microcontroller)
061 NMI
062-066 Forwarded to LPC (Microcontroller)
070-077 Real time clock, NMI
080-091 DMA page register
092 Processor I/F(Reset Generator)
093-09F DMA page register
0A0-0BF Interrupt controller #2
0C0-0DF DMA controller #2
0F0 Processor I/F
0F8-0FF Math processor
170-177 Forward to SATA (SATA Controller)
1F0-1F7 Forward to SATA (SATA Controller)
376 Forward to SATA(SATA Controller)
378-37F Parallel Port (LPT)
380-38F SDLC #2
3A0-3AF SDLC #1
3B0-3BF MDA video card
(to be continued)