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CMD-5xx   08/07/02

17

Personality Module (PM-5xx) Options and Settings

The PM-5xx modules provide the CPU with associated support hardware such as oscillator(s), debug support connectors, and
options for reconfiguring the CPU.  Nexus 50 pin standard development connector is also provided on the MPC561-566 versions.
The -T option PM boards provide a ZIF (zero insertion force) type socket for the host processor.

CONFIG

 

Switch

The CONFIGURATION SWITCH provides user options for MODCK settings, RSTCNF* signal operation, and internal flash
programming enables.  All PM modules provide the 6 switches but not all devices support internal Flash.

POSITION

OPTION

   

1,2,3

MODCK 1,2,3 setting.

ON = high level during RESET.
OFF = low level during RESET.
Default = 1,3 Off, 2 ON. 4MHz crystal oscillator reference, 20MHz default clock.

   

4

RSTCNF* Signal enable.

ON = External Reset Configuration Word Enabled
OFF = Internal Hard Reset Configuration Word
Default = ON.  CMD-555 board provides configuration Word.

   

5

EPEE enable. MPC555/6 Internal CMF flash array programming enable.

ON = EPEE signal enabled for programming internal CMF flash array.
OFF = EPEE signal disabled.

   

6

VPP enable. MPC555/6 Internal CMF flash array VPP programming voltage enable.

ON = VPP enabled for programming CMF flash Boot Block.
OFF = VPP disabled.

PM-555/6 Hardware Options

VDDSRAM Voltage Source Option

VDDSRAM is connected to the 3.3V supply on the PM-555 board by a zero ohm resistor R11.  To apply a different supply for the
VDDSRAM pin, the R11 resistor should be removed and the CMD-555 POWER_PORT connection can be used for applying the
new voltage source.

VDDSYN Voltage Source

The VDDSYN connection to the MPC555/6 may be isolated by from the 3.3V supply by removing inductor L1.  Alternate voltage
source can then be applied the VDDSYN at the CMD555 POWER_PORT.

KAPWR Voltage Source

The KAPWR connection is connected to the 3.3V supply on the PM-555 board by zero ohm resistor R8.  To apply a different
voltage source for low power back-up operations, R8 should be removed and the new source applied to the CMD555
POWER_PORT pin for the KAPWR connection.

VRH and VRL QADC Reference Supplies

Zero ohm resistors R9 and R10 provide isolation of VRH and VRL reference signals respectfully.  One or both of these resistors
may be removed to apply an external reference voltage at the CMD-555/6 QADC_A Port.

PM- 555/6 -T Additional Options

 

R36 / 37 Resistors -

 BDM Port VFLS1 signal selection option.

 

R38 / 39 Resistors -

 BDM Port VFLS0 signal selection option.

 

C4 XFC Filter -  

PLL operation XFC filter capacitor value option.

 

R35 Resistor 

- PORESET level detector isolation, remove to isolate 5V reset generator for PORESET signal.

Summary of Contents for CMD-5 Series

Page 1: ...ontrollers Versions CMD 555 CMD560 566 Users Manual Axiom Manufacturing 2000 2813 Industrial Lane Garland TX 75041 972 926 9303 FAX 972 926 6063 email support axman com web http www axman com This datasheet has been downloaded from http www digchip com at this page ...

Page 2: ...11 CFG_EN Jumper 11 MEMORY DEVICE BANK SELECTION AND CONFIGURATION 12 Memory Bank Chip Select Configuration 12 MAP_SW Ram Bank and Flash Bank Options 12 MEM_EN Jumper 13 MEM_OPT Jumper 13 MEM_VOLT Jumper 13 PRU_EN Jumper 13 COMMUNICATION PORTS 14 COM_SWITCH SERIAL PORT CONFIGURATION 14 JP1 COM 2 DCE DTE Option 14 DATA LINK CONTROLLER J1850 15 CAN INTERFACE AND OPTIONS 15 LCD PORT AND KEYPAD KEY PO...

Page 3: ...aces Port Replacement Unit Keypad and LCD Module support Serial Cable Wall Plug power source printed hardware manual and the UTL5xx CD with programming utilities support software and technical manuals Applications developed on the CMD 5xx are directly portable to the PMP xxx peripheral support boards for in system industrial control solutions Specifications Clock 50 MHz Maximum Operating temperatu...

Page 4: ...or MPC5xx ports on a 44 pin header QSM Ports 2 Serial I O ports with 16 pin socket headers MIOS Port MDA PWM and MGP timer or I O interface with 34 pin socket header TPU Ports 3 Timing Processor I O ports with 20 pin socket headers QADC Ports 2 Analog I O ports one 20 pin and one 24 pin socket header INT Port Interrupt or MPC5xx SGP port I O with 10 pin header POWER Port Primary and standby power ...

Page 5: ...ges and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Axiom Manufacturing was negligent regarding the design or manufacture of the part or system EMC Information on CMD565 1 This product as shipped from the factory with associated power supplies an...

Page 6: ...if everything is working properly you should see the main utilities menu similar to the following AXIOM CMD 5XX UTILITIES 1 Debug Monitor 2 On Chip CMFI Flash Programming 3 External Flash Programming 4 Test Hardware Select Your board is now ready to use If you do not see the monitor prompt press then release the RESET button on the board If still no go or if the text is garbage see the TROUBLESHOO...

Page 7: ... done by typing commands into the terminal program on the PC Type help and hit enter for a complete list of available commands You can experiment with some of the commands like reading MD and modifying MM memory Make sure you re modifying memory that is mapped to valid addresses or the monitor program will hang or throw an exception You may then have to RESET the board to get the monitor back Inte...

Page 8: ... to the board If you have problems uploading try adding a pacing delay 8 After all lines from the file have been programmed the words programmed are displayed along with any errors followed by the menu again Now the hello world program is at address 0xC00000 the current location of onboard flash however it is linked to be run from 0x400000 since this is the address the program assigns to the CS0 b...

Page 9: ...0 3 can be changed by your software to map the external memory in different locations but the chip select configuration for each memory type should be maintained Possible Chip Select usage Synchronous SRAM Memory Bank CS0 CS1 CS2 or CS3 default CS1 Burstable Flash Memory Bank CS0 CS1 or CS2 default CS2 Port Replacement Unit CS2 or CS3 default CS3 MEM Sockets Bank CS0 CMD 5xx Default Memory Map Int...

Page 10: ... will provide voltage level of 5V high refer to MPC5xx technical data for host PRU I O port input voltage levels are tolerant of 5V signals The PRU register operation and memory map closely follows the MPC5xx I O port data and direction registers located at internal addresses 2FC024 2FC02F Following is the memory map of the PRU PRU Offset Address Register Name Register Information Port 0x0000 LCD ...

Page 11: ... 5 ATWC Address Type Write Enable Pins Configuration Off WE BE 0 3 6 7 EBDF External Bus Division Factor Off Equal to CLKOUT 8 Reserved Future Use Off Mode Switch 3 Control Register Bit Reset Function Default Position 1 PRPM Peripheral Mode Enable Off Not Peripheral 2 3 SC 0 1 Single Chip Select Off On 16 bit bus On Off Single chip w Show cycles On On Single Chip Off Off 32 bit bus 4 ETRC Exceptio...

Page 12: ...800003 Base Address 0x800000 Port width 32 bit FIXED Default RAM asynchronous mode ORx 0xFFC0000 Memory Range 0x400000 wait state 0 or 1 Note asynchronous operation requires 1 wait state no matter clock frequency on rev C CY1339 devices RAM burst mode ORx TBD TBD Flash 32 bit port asynchronous BRx 0x00C00003 Base address 0xC00000 Port width 32 bit Default MAP_SW 8 off Flash 16 bit port asynchronou...

Page 13: ...ms Both 5v and 3 3V versions can be used MEM_VOLT Jumper The MEM_VOLT option jumper determines the MEM Sockets device operating voltage This should be set to the voltage required for the device s installed in U15A B and U16 The device must be compatible with the bus voltage level of the installed MPC5xx or damage to the MPC5xx can occur 1 2 3 Position 1 2 MEM U15 U16 devices are 5V operation Defau...

Page 14: ... group by cutting the associated trace on the bottom side of the board 2 COM 2 has a DCE DTE option see below COM_SWITCH Serial Port Configuration The COM_SWITCH provides a means of isolating the individual SCI RXD and TXD signals from the RS232 interface translator device U31 This allows the SCI channels to be used for other purposes In conjunction with the COM_PORT header additional signals can ...

Page 15: ...inimum slew rate fast edge and enables the output of the respective transceiver Opening the option disables transceiver output to the CAN bus With the option jumper removed Pin 2 of the option header can be connected by the user to an available I O port for software control of transceiver output active low Slew rate can be increased if necessary to reduce switching noise by increasing the value of...

Page 16: ...U is as follows LCD Keypad Memory Map 0x0000 LCD_PORT Command Register 1 for up to 80 character display 0x0001 LCD_PORT Display Data Register 1 for up to 80 character display 0x0002 LCD_PORT Command Register 2 for graphic or 160 character display 0x0003 LCD_PORT Display Data Register 2 for graphic or 160 character display 0x0004 Keypad KEY_PORT key data Read Only 0x0005 Keypad KEY_PORT key data Re...

Page 17: ...for programming CMF flash Boot Block OFF VPP disabled PM 555 6 Hardware Options VDDSRAM Voltage Source Option VDDSRAM is connected to the 3 3V supply on the PM 555 board by a zero ohm resistor R11 To apply a different supply for the VDDSRAM pin the R11 resistor should be removed and the CMD 555 POWER_PORT connection can be used for applying the new voltage source VDDSYN Voltage Source The VDDSYN c...

Page 18: ...he VDDSYN connection KAPWR Voltage Source The KAPWR connection to the MPC561 4 provides CUT AWAY pad 1 for isolation to apply a different voltage source for low power back up operations 1 CUT AWAY pad should be cut and the new source applied to the CMD561 4 POWER_PORT pin for the KAPWR connection VRH and VRL QADC Reference Supplies CUT AWAY pads 4 and 5 provide isolation of VRH and VRL reference s...

Page 19: ...emoved to apply an external reference voltage to the CMD561 4 QADC_A Port EPEE and BOEPEE CUTAWAY 3 The PM565 6 board has the EPEE and BOEPEE signals connected by CUT_AWAY pad 3 This connection is for NEXUS port programming of the CMFI flash This connection will cause the CONFIG_SW position 5 or 6 to enable both signals If this operation is not desired by the user cut the CUT AWAY 3 pad to isolate...

Page 20: ... a strait through serial cable such as the one provided 8 If you get an exception error or if your program hangs or appears to jump out into unused memory it is usually caused by trying to access un mapped or improperly configured memory addresses Look at the Memory Map page of this manual for the default memory map as set by the monitor program Memory device location and address range is all conf...

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