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GATING MODES
Triggering can be suppressed by a TTL-level signal on the rear-panel GATE connector.
The instrument can be set to stop triggering when this input high or low, using the front-
panel gate menu or the appropriate programming commands. This input can also be
set to act synchronously or asynchronously. When set to asynchronous mode, the
GATE will disable the output immediately. Output pulses may be truncated. When set to
synchronous mode, the output will complete the full pulse width if the output is high,
and then stop triggering. No pulses are truncated in this mode.
AMPLITUDE CONTROL
The output voltage amplitude may be set from the front panel, or by computer
command. However, the actual amplitude delivered to the load should always be
verified using an oscilloscope, for several reasons:
1. The high currents (250A) may result in noticeable voltage drop across any user-
attached cables and connectors.
2. The output impedance of the pulse generator is approximately 0.05 Ohms. The
amplitude is factory-calibrated using a 1.0 Ohm load at 10 Hz with 10 us pulse
width. If a high-impedance load is connected, the output amplitude may be
somewhat higher.
3. The amplitude may vary by a few percent, depending on the duty cycle.
4. The maximum voltage & current amplitudes will be reduced by 10%,
approximately, when the average output power exceeds 75 Watts.
5. The maximum voltage & current amplitudes will be reduced by 20%,
approximately, when the pulse width is less than 2 × rise time.
When operating at high duty cycles, the internal high-voltage DC power supply may
overload if the amplitude is suddenly increased by a large factor. For example, if the
timing is set to maximum duty cycle and the amplitude to set to maximum, and the
otuput is switched from “off” to “on”, the amplitude may not actually reach the set value.
If this is a problem in your application, set the trigger mode to “hold”, set the output to
“on”, increase the amplitude, wait a few seconds, and then set the desired trigger mode
(“internal”, “external”, “manual” or “immediate”). This allows the internal power supply to
charge up before enabling triggering.
PREVENTING OUTPUT STAGE FAILURE
The output stage is protected against overload conditions by an overload circuit and
fuses on the main frame back panel. However, the output switching elements may fail if
the unit is triggered at a PRF exceeding 1 kHz continuously or at duty cycles resulting in
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Summary of Contents for AVOZ-E3-B
Page 38: ...WIRING DIAGRAMS WIRING OF AC POWER...
Page 39: ...PCB 158R6 LOW VOLTAGE POWER SUPPLY...
Page 41: ...PCB 235D HIGH VOLTAGE DC POWER SUPPLY...
Page 42: ...PCB 197K HIGH VOLTAGE DISCHARGE CIRCUIT...
Page 43: ...PCB 104G KEYPAD DISPLAY BOARD...
Page 44: ...MAIN WIRING POSITIVE UNITS...
Page 45: ...PERFORMANCE CHECK SHEET 45...