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RTX-24EM-HP
User guide
The technical characteristics can change without notice. AUR°EL S.p.A doesn’t assume the responsibility to the damages caused by an improper use of the device.
AUR°EL S.p.A.
Via Foro dei Tigli, 4 - 47015 Modigliana (FC) – ITALY 12/11/2019 - Rev. A
Tel.: +390546941124 – Fax: +390546941660 Page 2
http://www.aurel.it
9.
Programming interface ................................................................................................................. 19
9.1
RAM2, RAM1 reset .................................................................................................................... 19
9.2
RAM2 Initialization ................................................................................................................... 19
9.3
Internal PTAT current auto calibration ....................................................................................... 19
9.4
VCO auto calibration ................................................................................................................. 20
9.5
Channel Data Rate .................................................................................................................... 21
9.5.1
Bit stuffing ........................................................................................................................... 21
9.6
RF operating frequency ............................................................................................................. 22
9.7
Address byte ............................................................................................................................. 22
9.8
TX Power level .......................................................................................................................... 23
9.9
Packet (TX and RX) payload ....................................................................................................... 23
9.9.1
Mode payload size in the header............................................................................................ 23
9.9.2
Mode payload size in RAM2 ................................................................................................... 23
9.10
Register TXFIFO and RXFIFO ................................................................................................... 24
9.11
Received Signal Strength Indicator (RSSI) ............................................................................... 24
9.12
Frequency error register : DFT_Mes[7:0] ................................................................................ 25
10
Transmission programming flow ............................................................................................... 25
10.1
Transmission flow, mode payload size defined in header ........................................................ 25
10.2
Transmission flow, mode payload size defined in RAM2 ......................................................... 26
11
Reception programming flow .................................................................................................... 27
11.1
Reception flow, mode payload size defined in header ............................................................. 27
11.2
Reception flow, mode payload size defined in RAM2 .............................................................. 28
12
RAM2 Registers......................................................................................................................... 29
13
RF Packet format ...................................................................................................................... 37
14
Device usage ............................................................................................................................. 38
15
Revision History ........................................................................................................................ 38