2
AVR1612
8282A-AVR-11/10
2 PDI Target Implementation
2.1 PDI Frame Format
The PDI physical layer uses a standard UART frame format. A serial frame is defined
to be one character of eight data bits with start and stop bits and an even parity bit.
In case of write collisions or parity errors a break character (all data, parity and stop
bits set low) can be sent. Please refer to the datasheet for more information about the
break character. The
describes the PDI serial frame format.
Figure 2-1.
PDI serial frame format.
2.2 Serial transmission and reception
The PDI physical layer is either in Transmit (TX) or Receive (RX) mode of operation.
By default it is in RX mode, waiting for a start bit.
The programmer and the PDI operate synchronously on the PDI_CLK provided by the
programmer. The dependency between the clock edges and data sampling or data
change is fixed. As illustrated in
, output data (either from the programmer
or from the PDI) is always set up (changed) on the falling edge of PDI_CLK, while
data is always sampled on the rising edge of PDI_CLK.
Figure 2-2.
Changing and sampling of data.