Atmel AVR1612, Application Note

Page: 11 / 15

AVR1612
11
8282A-AVR-11/10
3.4.2.4 Erase & Write Page
The Erase & Write Application Section Page, Erase & Write Boot Loader Section
Page, and Erase & Write EEPROM Page is used to erase one page and then write a
loaded Flash/EEPROM page buffer into that page in the selected memory space, in
one atomic operation.
1. Load the NVM CMD register with Erase & Write Application Section/Boot Loader
Section/User Signature Row/EEPROM Page command.
2. Write the selected page by doing a PDI Write. The page is written by addressing
any byte location within the page.
The BUSY flag in the NVM STATUS register will be set until the operation is finished.
3.4.3 Read NVM
The Read NVM command is used to read the Flash, EEPROM, Fuses, and Signature
and Calibration row sections.
1. Load the NVM CMD register with the Read NVM command.
2. Read the selected memory address by performing a PDI Read operation.
NOTE The address is PDI memory space address which described in each device data
sheet.
3.4.4 Write Fuse/Lock Bit
The Write Fuse and Write Lock Bit command is used to write the fuses and the lock
bits to a more secure setting.
1. Load the NVM CMD register with the Write Fuse/ Lock Bit command.
2. Write the selected fuse or Lock Bits by doing a PDI Write operation.
The BUSY flag in the NVM STATUS register will be set until the command is finished.
For lock bit write the LOCK BIT write command can also be used.
3.5 Exit the PDI programming
If there is no activity on the PDI_CLK line for approximately 100µs, the PDI
automatically disabled. Then set the PDI_CLK to High and set the PDI_DATA to Low.
4 Example of programming sequence
After enabling the PDI module and entering external programming mode, the device
is ready for programming and reading the memory. For more information about the
PDI initialization, please refer to Section
2 .
•
Read the memory (include Flash, EEPROM, User Signature, Fuse bits)
1. Use STS instruction to write the “Read NVM command (0x43)” to the NVM
controller’ CMD register. The CMD register’s address is 0x01CA (The NVM
Controller’s base address is 0x01C0 and the CMD register’s offset address is
0x0A). Please refer to “4.21 Register Summary - NVM Controller” section and
“31. Peripheral Module Address Map” section of the
for
more information.
2. Set the memory address with “ST ptr” command which is described in Section
3.4 . The address is mapped into the PDI memory space.
3. Set the data length into the repeat counter with “REPEAT” command.
4. Send the “LD *(ptr++)” command to the PDI controller.
5. Poll to read the PDIBUS until the data delivery completion.