18
ATtiny22/22L
Reset and Interrupt Handling
The ATtiny22/L provides two interrupt sources. These interrupts and the separate reset vector, each have a separate
program vector in the program memory space. Both interrupts are assigned individual enable bits which must be set (one)
together with the I-bit in the status register in order to enable the interrupt.
The lowest addresses in the program memory space are automatically defined as the Reset and Interrupt vectors. The
complete list of vectors is shown in Table 2 . The list also determines the priority levels of the interrupts. The lower the
address the higher is the priority level. RESET has the highest priority, next is INT0 - the External Interrupt Request 0, etc.
The most typical program setup for the Reset and Interrupt Vector Addresses are:
Reset Sources
The ATtiny22/L provides three sources of reset:
• Power-On Reset. The MCU is reset when the supply voltage is below the power-on reset threshold (V
POT
).
• External Reset. The MCU is reset when a low level is present on the RESET pin for more than 50 ns.
• Watchdog Reset. The MCU is reset when the Watchdog timer period expires and the Watchdog is enabled.
During reset, all I/O registers are set to their initial values, and the program starts execution from address $000. The
instruction placed in address $000 must be an RJMP - relative jump - instruction to the reset handling routine. If the
program never enables an interrupt source, the interrupt vectors are not used, and regular program code can be placed at
these locations. The circuit diagram in Figure 22 shows the reset logic. Table 3 defines the timing and electrical parameters
of the reset circuitry.
Table 2. Reset and Interrupt Vectors
Vector No.
Program Address
Source
Interrupt Definition
1
$000
RESET
Hardware Pin, Power-on Reset and Watchdog Reset
2
$001
INT0
External Interrupt Request 0
3
$002
TIMER0, OVF0
Timer/Counter0 Overflow
Address
Labels
Code
Comments
$000
rjmp RESET
; Reset Handler
$001
rjmp EXT_INT0
; IRQ0 Handler
$002
rjmp TIM_OVF0
; Timer0 Overflow Handler;
$003
MAIN:
ldi r16, low(RAMEND)
; Main program start
out SPL, r16
<instr> xxx
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