Atmel AT32UC3A3128, Manual

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12
32072H–AVR32–10/2012
AT32UC3A3
Note: 1. Those balls are physically connected to 2 GPIOs. Software must managed carrefully the GPIO
configuration to avoid electrical conflict.
2. Refer to ”Electrical Characteristics” on page 960 for a description of the electrical properties of
the pad types used..
3.2.2 Peripheral Functions
Each GPIO line can be assigned to one of several peripheral functions. The following table
describes how the various peripheral functions are selected. The last listed function has priority
in case multiple functions are enabled on the same pin.
3.2.3 Oscillator Pinout
The oscillators are not mapped to the normal GPIO functions and their muxings are controlled
by registers in the Power Mananger (PM). Please refer to the PM chapter for more information
about this.
Note: 1. This ball is physically connected to 2 GPIOs. Software must managed carrefully the GPIO con-
figuration to avoid electrical conflict
J4 78 PX56 107 VDDIO x2 EBI - ADDR[21] EIC - SCAN[2] USART2 - TXD
H4 76 PX57 108 VDDIO x2 EBI - ADDR[20] EIC - SCAN[1] USART3 - RXD
H3 57 PX58 109 VDDIO x2 EBI - NCS[0] EIC - SCAN[0] USART3 - TXD
G3 56 F1
(1)
PX59 110 VDDIO x2 EBI - NANDWE MCI - CMD[1]
Table 3-1. GPIO Controller Function Multiplexing
BGA
144
QFP
144
BGA
100 PIN
G
P
I
O Supply
PIN
Type
(2)
GPIO function
A B C D
Table 3-2. Peripheral Functions
Function Description
GPIO Controller Function multiplexing GPIO and GPIO peripheral selection A to D
Nexus OCD AUX port connections OCD trace system
JTAG port connections JTAG debug port
Oscillators OSC0, OSC1, OSC32
Table 3-3.Oscillator Pinout
TFBGA144 QFP144 VFBGA100 Pin name Oscillator pin
A7 18 A5 PC02 XIN0
B7 19 A6 PC03 XOUT0
A8 13 B7 PC04 XIN1
A9 12 A7 PC05 XOUT1
K5 98 K5
(1)
PC00 XIN32
H6 99 K6 PC01 XOUT32