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3
VMIVME-3126A High Resolution, Isolated Analog-to-Digital Converter Board
Board Control Register (BCR)
The Board Control Register (BCR) contains status and control of the board’s operations.
The user can initiate channel reconfiguration, channel calibrations, autozeroing of
channels, and a software reset.
Powerup/Reset Default = $0000
Board Control Register Bit Definitions
Bit 15:
LED -
The front panel LED is turned ON by writing a logical one
(1) to this bit. After successfully completing self-test, the LED will
extinguish if the UIOC jumper (E10) is not installed. If the UIOC
jumper is installed, the LED will remain ON after completing
self-test. The user can extinguish the LED by writing a logical
zero (0) to this bit.
Bit 14:
WDOG -
This is a status bit, informing the user that a Watchdog
Timeout
has caused a reset. The user must acknowledge this bit
being set by writing a logical one (1) to the
RESET_B
bit located in
this register. This will cause the DSP to initiate a board reset as
described in Reset Operations and Initialization on page 48. The
DSP resets this bit to a logical zero (0) after completing the board
reset.
Bit 13:
WRITE COEF -
When this bit is set, the gain and offset
coefficients stored in the DSP internal memory are written to the
E
2
PROM. This bit is automatically cleared after the coefficients
are written to the E
2
PROM.
Bit 12:
COEF Status -
This is a status bit, indicating, whether user-
defined coefficients are being used in the offset and gain
correction of data. This bit is set to a logical one (1) for user-
defined coefficients. The bit is reset if the coefficients are written
to the E
2
PROM, or a reset condition occurs.
Bits 09 through 11:
Reserved -
These bits are reserved and should be written as
logical zero (0).
Table 3-5 Board Control Register’s Bit Map
Board Control Register (Offset $0004) Read/Write, Byte/Word
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 09
Bit 08
LED
WDOG
WRITE COEF
COEF Status
Reserved
Reset_A
Bit 07
Bit 06
Bit 05
Bit 04
Bit 03
Bit 02
Bit 01
Bit 00
Reset_B
Autozero
Data
Ready
USER
COEF
SYS
Reconfig
Chan
Cal’d
INIT
CAL
CAL
Done
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