25
Digital Signal Processor (DSP)
1
Figure 1-3 Channel Reconfiguration Flowchart
Enter channels to be reconfigured into SCR
Does BRR
read $0000?
Enter reconfigure code
which is enabled in the SCR
into each channel’s CSR
Set SYS RECONFIG bit in the BCR
Wait approximately 101 msec to
complete reconfiguration
Begin reading new data from RAM
YES
NO
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