Artesyn MVME2502, Installation And Use Manual, Page: 94 / 164

Functional Description
MVME2502 Installation and Use (6806800R96D )
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4.6.3 Firmware Redundancy
The MVME2502 utilize two physically separate boot devices to provide boot firmware
redundancy. Although the P2020 provides four SPI Bus chip selects, the P2020 is only capable
of booting from the SPI Device controlled by chip select 0. External SPI multiplexing logic is
implemented on the MVME2502 to accommodate this chipset limitation.
The MVME2502 CPLD controls the chip select to SPI devices A and B. The CPLD chip select
control is based on the Switch Bank (S2-2).
On power-up, the selection of the SPI boot device is strictly based upon the Switch Bank (S2-2)
setting. Depending on the S2-2 setting, SPI_SEL0 is routed to one of two SPI devices. The
selected SPI device must contain a boot image. Once the boot image is copied into memory
and executed, the CPLD will wait, and once the P2020 will write on one bit of the CPLD
watchdog register, the CPLD will then pass through the SPI chip select from the P2020 to SPI
device chip selects. Now the software can perform read/write processes on any SPI device,
including copying from one SPI device to another.
Figure 4-2 SPI Device Multiplexing Logic