1.1 Product Overview
1-11
No.
Item
Specifications
3.1.2
3.1.2.1
3.1.2.2
3.1.2.3
SDH/SONET
Clock
Frame format
No frame
Framed
Mapping
Terms for SDH and SONET can be replaced each other.
Internal:Accuracy:
±
0.1 ppm (Refer to 3.1.1.1.)
Offset :
±
100 ppm (in 0.1 ppm steps)
It is guaranteed up to
±
100 ppm including devi-
ation of DCS input and Offset.
External: Refer to 1.1.
Receive: synchronous with receive signal
51.84 Mbit/s, 155.52 Mbit/s, 622.08 Mbit/s, 2488.32 Mbit/s
SDH:STM0, STM1, STM4, STM16
SONET:OC1, OC3,OC12, OC48
STM16/STS48 Mapping
×
3
×
4
×
7
×
3
STM16
STM4
STM1
STM0
AU3
VC3
TUG
TU3
VC3
TU2
VC2
TUG
VC11
VC12
TU12
TU11
139 M(Async.)
Bulk
34 M(Sync.)
34 M(Async.)
45 M(Async.)
Bulk
Bulk
6 M(Async)
6 M(Bitsync)
mc
2 M(Async.)
2 M(Bitsync.F)
2 M(Bytesync.F)
Bulk
1.5 M(Async.)
1.5 M(Bitsync.F)
1.5 M(Bytesync.F)
Bulk
384 K D/V
Byte D/V
FDDI(Async.)
AUG AU4
VC4
×
7
Concatenation mapping
Bulk
Bulk
STM-4c
STM-16c
×
4
Bulk
VC-4
×
4c
VC-4
×
16c
VC-4
×
nc